From patchwork Fri Aug 8 14:27:08 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 35129 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-pa0-f71.google.com (mail-pa0-f71.google.com [209.85.220.71]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 2DF7A21457 for ; Fri, 8 Aug 2014 14:28:37 +0000 (UTC) Received: by mail-pa0-f71.google.com with SMTP id et14sf36380619pad.10 for ; Fri, 08 Aug 2014 07:28:35 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:cc:subject:date:message-id :mime-version:sender:precedence:list-id:x-original-sender :x-original-authentication-results:mailing-list:list-post:list-help :list-archive:list-unsubscribe:content-type; bh=DVstB0/wExDt0n93XQ5eYNo+hwtRy9ILFYlpCAyy8+g=; b=MiS84yoaYhxsbc1Z+6QPjEEXpc/Kb9+5YOWIoWRb75O0+Lc+PQm9cnmjIF5Dpko0dD NUzaiRG9p/31xTCnGeAbhyKtZ9UIxjKAnSf2tV4zTrzhlcpzDsLtqgvliggUQp5aZa6x G9zlXi6U/p/2+FMaUKH7JbsC/yiZcJ95vd8PXn7WcxvOZsnlCjz+PNut/ymstwEvZG75 htodIeLfj8uGPMXOZbmFGxRq5gjiZGRYtuMAIeeY8+ItmiJPX5Gj9GmdYAPXPqtQnRXh rDVB9k5AQHthWJngp2EJAozYo202+qqxpEEorZNOGPEP1tIGvnejs9bZd5mQC+5bS8Dv zRMw== X-Gm-Message-State: ALoCoQnO3rZ+bORt+Rs60bBsCDaWlqqkYWLVN9E/cfMVp9rclWWlP8eO7FiE6JW20BOZxUjVV3zl X-Received: by 10.66.90.193 with SMTP id by1mr12753568pab.30.1407508115883; Fri, 08 Aug 2014 07:28:35 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.34.99 with SMTP id k90ls536132qgk.78.gmail; Fri, 08 Aug 2014 07:28:35 -0700 (PDT) X-Received: by 10.52.245.66 with SMTP id xm2mr6940851vdc.36.1407508115767; Fri, 08 Aug 2014 07:28:35 -0700 (PDT) Received: from mail-vc0-f171.google.com (mail-vc0-f171.google.com [209.85.220.171]) by mx.google.com with ESMTPS id gv1si2933891vdb.27.2014.08.08.07.28.35 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 08 Aug 2014 07:28:35 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.171 as permitted sender) client-ip=209.85.220.171; Received: by mail-vc0-f171.google.com with SMTP id hq11so8417024vcb.16 for ; Fri, 08 Aug 2014 07:28:35 -0700 (PDT) X-Received: by 10.221.47.9 with SMTP id uq9mr1053557vcb.48.1407508115659; Fri, 08 Aug 2014 07:28:35 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.221.37.5 with SMTP id tc5csp126985vcb; Fri, 8 Aug 2014 07:28:35 -0700 (PDT) X-Received: by 10.70.60.169 with SMTP id i9mr1605213pdr.166.1407508114686; Fri, 08 Aug 2014 07:28:34 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id ka10si2090041pbd.160.2014.08.08.07.28.34 for ; Fri, 08 Aug 2014 07:28:34 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756904AbaHHO20 (ORCPT + 26 others); Fri, 8 Aug 2014 10:28:26 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:46636 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752570AbaHHO2W (ORCPT ); Fri, 8 Aug 2014 10:28:22 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id s78ERGPH000907; Fri, 8 Aug 2014 09:27:16 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s78ERFPF002612; Fri, 8 Aug 2014 09:27:15 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.174.1; Fri, 8 Aug 2014 09:27:15 -0500 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s78ERBwZ023685; Fri, 8 Aug 2014 09:27:11 -0500 From: Roger Quadros To: , , CC: , , , , , , , , , Roger Quadros , Subject: [PATCH] mtd: nand: omap: Fix 1-bit Hamming code scheme, omap_calculate_ecc() Date: Fri, 8 Aug 2014 17:27:08 +0300 Message-ID: <1407508028-12973-1-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 1.8.3.2 MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: rogerq@ti.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.171 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , commit 65b97cf6b8de introduced in v3.7 caused a regression by using a reversed CS_MASK thus causing omap_calculate_ecc to always fail. As the NAND base driver never checks for .calculate()'s return value, the zeroed ECC values are used as is without showing any error to the user. However, this won't work and the NAND device won't be guarded by any error code. Fix the issue by using the correct mask. Code was tested on omap3beagle using the following procedure - flash the primary bootloader (MLO) from the kernel to the first NAND partition using nandwrite. - boot the board from NAND. This utilizes OMAP ROM loader that relies on 1-bit Hamming code ECC. Fixes: 65b97cf6b8de (mtd: nand: omap2: handle nand on gpmc) Cc: [3.7+] Signed-off-by: Roger Quadros --- drivers/mtd/nand/omap2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c index f0ed92e..e2b9b34 100644 --- a/drivers/mtd/nand/omap2.c +++ b/drivers/mtd/nand/omap2.c @@ -931,7 +931,7 @@ static int omap_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u32 val; val = readl(info->reg.gpmc_ecc_config); - if (((val >> ECC_CONFIG_CS_SHIFT) & ~CS_MASK) != info->gpmc_cs) + if (((val >> ECC_CONFIG_CS_SHIFT) & CS_MASK) != info->gpmc_cs) return -EINVAL; /* read ecc result */