From patchwork Thu Jun 14 05:11:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 138515 Delivered-To: patch@linaro.org Received: by 2002:a2e:970d:0:0:0:0:0 with SMTP id r13-v6csp1638079lji; Wed, 13 Jun 2018 22:13:09 -0700 (PDT) X-Google-Smtp-Source: ADUXVKILV2voxlFBcG6mwlmHDX5hn6VizLEVloxLeCBIjuaPB0L1OP0gCYFMk/hiDKWqKf2Kb3qn X-Received: by 2002:a62:4395:: with SMTP id l21-v6mr7934888pfi.196.1528953188978; Wed, 13 Jun 2018 22:13:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1528953188; cv=none; d=google.com; s=arc-20160816; b=RQmqld9KE2EkvetfvF41ymsJhWbTGl7z4lbxbQ5zyr4hVhiqfIrEWlMnZxHWKgGesM fuATJLu2zYSaKN+rPZokHb1Vb5Y52j26RSkr7pLOD5MhjvDMHh9zn1xSb1gUi7Yp6M7r eAteFjNiUAizKhvCzmFGDbhvD8erPJAQsHAy0Y6f5HOuM1WfykDx5UN29NEDCdxjjbRm dMa/99vdRSi0LK8iiaoCgdFNtsEdfNeiD281IC5MRd7up0wBg2WGO6eJ/9ExlwHxjwk3 duvohHtKHG5Md95nWPB+LESjoGslTh2oU+X06FZOXL7otBlGS2IQc8S8aNkGEtDbjP+Q vCLQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:sender:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:references:in-reply-to:message-id:date:subject :to:from:dkim-signature:dkim-filter:dkim-signature :arc-authentication-results; bh=vcoM2jeAHbniM4/GxZc1wX8nIl35lJgYOlvv4EYmbmY=; b=gfsa+k29ZBff6OGyNGEiGlznCP2R5MTSCWVZscSzNW1riObjA4RiE2r0BegXtmu3jk W/z6QbjZq2cuHahEXejYeIDgGGmN1xElkto6y/2JMg9mmVwNg6/IAa3vzlGK4PC+Yn0P 1HIe78lM/IY6gnXs3qztA+L++KCJlFI0mEib4F8n96COVHNCp6es45lMOvSj5wlA/6/0 4Jz3dRZuq4MZqBUYmMTXKQz//Cp7g80ZvJr036OkZVic8VhTBARQbmgw2B7Dt1hwdDXQ QZ21unkBYM8bRPf0qD0fYWNjEigmy1y2eXcXsujGZBRPunI9Wruz38O3JGiFRreiOTEy 1jyQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@lists.infradead.org header.s=bombadil.20170209 header.b=gOsFG+rJ; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=RFmIZCHv; spf=pass (google.com: best guess record for domain of linux-mtd-bounces+patch=linaro.org@lists.infradead.org designates 2607:7c80:54:e::133 as permitted sender) smtp.mailfrom="linux-mtd-bounces+patch=linaro.org@lists.infradead.org" Return-Path: Received: from bombadil.infradead.org (bombadil.infradead.org. [2607:7c80:54:e::133]) by mx.google.com with ESMTPS id v6-v6si4533612plp.60.2018.06.13.22.13.08 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 13 Jun 2018 22:13:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-mtd-bounces+patch=linaro.org@lists.infradead.org designates 2607:7c80:54:e::133 as permitted sender) client-ip=2607:7c80:54:e::133; Authentication-Results: mx.google.com; dkim=pass header.i=@lists.infradead.org header.s=bombadil.20170209 header.b=gOsFG+rJ; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=RFmIZCHv; spf=pass (google.com: best guess record for domain of linux-mtd-bounces+patch=linaro.org@lists.infradead.org designates 2607:7c80:54:e::133 as permitted sender) smtp.mailfrom="linux-mtd-bounces+patch=linaro.org@lists.infradead.org" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=vcoM2jeAHbniM4/GxZc1wX8nIl35lJgYOlvv4EYmbmY=; b=gOsFG+rJIrTSKie2wX2FMmpjqR pft1KgXVFsmHqbOILiPqnIazkChZD7M1nzg7SJMCJMVqjsyH3XqhjGkOCB3oz65PUF3CpGVBrX3Uf OzqIJ6vWo2ODVlOge3vXykA428Y/7RUL0TWdHBqYbE+eMM8Jf0yLlsZQWU37nDk6waDfVu5w3coHh u8DJEay5/2DeVFk9ljJ9K8sgaOZACSFGGPMpFA55PqAq92qpio8A3n2CiiQokpdSFhcttwU4YoIWu qdDe+lIFd1TwND+lF0kMnlDtzo0m4Xi74bgyqEzSFO0hH7vWfQeywnl7aRSJwzwg5ODt+HlawWK0m emOyMiiA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1fTKZ8-0005bZ-Up; Thu, 14 Jun 2018 05:12:58 +0000 Received: from conuserg-10.nifty.com ([210.131.2.77]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1fTKYB-0004wE-3j for linux-mtd@lists.infradead.org; Thu, 14 Jun 2018 05:12:27 +0000 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-10.nifty.com with ESMTP id w5E5BB4d003441; Thu, 14 Jun 2018 14:11:14 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-10.nifty.com w5E5BB4d003441 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1528953075; bh=hbd48UNc6f10cR0u3CexApki7qmgrdchS+BaKfqV0/E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RFmIZCHv1o2RDrW4qbYAKqILTZuaW/R3WKsuvcUsL+/LtrzCprS2Ft7w9zl5PF9Pd tzq3KFEwiQjsA33CfHeJgtZoMCAZXKHbIgsJRu6ThOL9Dcx9onnuQNtOx/aQcJPEqR eJmpaFZe3IwLx4ebMZ2rXnATze/EvyFJDOkiQ22rT+VooHNmGP9EHGhBBrnZTnfm9a M6ux5KtAl1MeHf98nTXErZmJbKSF1w2C9aELsW1p1yy4MsjuWVtSjos+DRxpUwX5IC 344qChz5d/q3s1JdV22XOk1tZ7oIJ7UuzKNXSzOg2cZ2kHCQPb/xQQYFBAEAZko8gi oErVumRuRRGSw== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-mtd@lists.infradead.org, Boris Brezillon Subject: [PATCH v2 2/3] mtd: rawnand: denali_dt: add more clocks based on IP datasheet Date: Thu, 14 Jun 2018 14:11:06 +0900 Message-Id: <1528953067-24324-3-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1528953067-24324-1-git-send-email-yamada.masahiro@socionext.com> References: <1528953067-24324-1-git-send-email-yamada.masahiro@socionext.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180613_221159_460363_0D911227 X-CRM114-Status: GOOD ( 17.71 ) X-Spam-Score: 1.0 (+) X-Spam-Report: SpamAssassin version 3.4.1 on bombadil.infradead.org summary: Content analysis details: (1.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [210.131.2.77 listed in list.dnswl.org] 1.0 SPF_SOFTFAIL SPF: sender does not match SPF record (softfail) -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Rob Herring , Brian Norris , devicetree@vger.kernel.org, Richard Weinberger , linux-kernel@vger.kernel.org, Masahiro Yamada , Rob Herring , Miquel Raynal , Philipp Rosenberger , Richard Weinberger , David Woodhouse , Marek Vasut MIME-Version: 1.0 Sender: "linux-mtd" Errors-To: linux-mtd-bounces+patch=linaro.org@lists.infradead.org According to the Denali User's Guide, this IP needs three clocks: - clk: controller core clock - clk_x: bus interface clock - ecc_clk: clock at which ECC circuitry is run Currently, denali_dt.c requires a single anonymous clock and its frequency. However, the driver needs to get the frequency of "clk_x" not "clk". This is confusing because people tend to assume the anonymous clock means the core clock. Instead of the cheesy implementation, the clocks in the real hardware should be represented in the driver and the DT-binding. However, adding new clocks would break the existing platforms. For the backward compatibility, the driver still accepts a single clock just as before. If clk_x is missing, clk_x_rate is set to a hardcoded value. It is fine because both Altera (Intel) SOCFPGA and Socionext UniPhier use 200 MHz for the bus interface clock. Signed-off-by: Masahiro Yamada --- Changes in v2: split into sensible chunks .../devicetree/bindings/mtd/denali-nand.txt | 5 +++ drivers/mtd/nand/raw/denali_dt.c | 49 ++++++++++++++++++++-- 2 files changed, 50 insertions(+), 4 deletions(-) -- 2.7.4 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ diff --git a/Documentation/devicetree/bindings/mtd/denali-nand.txt b/Documentation/devicetree/bindings/mtd/denali-nand.txt index 0ee8edb..f33da87 100644 --- a/Documentation/devicetree/bindings/mtd/denali-nand.txt +++ b/Documentation/devicetree/bindings/mtd/denali-nand.txt @@ -8,6 +8,9 @@ Required properties: - reg : should contain registers location and length for data and reg. - reg-names: Should contain the reg names "nand_data" and "denali_reg" - interrupts : The interrupt number. + - clocks: should contain phandle of the controller core clock, the bus + interface clock, and the ECC circuit clock. + - clock-names: should contain "nand", "nand_x", "ecc" Optional properties: - nand-ecc-step-size: see nand.txt for details. If present, the value must be @@ -31,5 +34,7 @@ nand: nand@ff900000 { compatible = "altr,socfpga-denali-nand"; reg = <0xff900000 0x20>, <0xffb80000 0x1000>; reg-names = "nand_data", "denali_reg"; + clocks = <&nand_clk>, <&nand_x_clk>, <&nand_ecc_clk>; + clock-names = "nand", "nand_x", "ecc"; interrupts = <0 144 4>; }; diff --git a/drivers/mtd/nand/raw/denali_dt.c b/drivers/mtd/nand/raw/denali_dt.c index d923cfa..afaae37 100644 --- a/drivers/mtd/nand/raw/denali_dt.c +++ b/drivers/mtd/nand/raw/denali_dt.c @@ -27,7 +27,9 @@ struct denali_dt { struct denali_nand_info denali; - struct clk *clk; + struct clk *clk; /* core clock */ + struct clk *clk_x; /* bus interface clock */ + struct clk *clk_ecc; /* ECC circuit clock */ }; struct denali_dt_data { @@ -115,24 +117,61 @@ static int denali_dt_probe(struct platform_device *pdev) if (IS_ERR(denali->host)) return PTR_ERR(denali->host); - dt->clk = devm_clk_get(dev, NULL); + /* + * A single anonymous clock is supported for the backward compatibility. + * New platforms should support all the named clocks. + */ + dt->clk = devm_clk_get(dev, "nand"); + if (IS_ERR(dt->clk)) + dt->clk = devm_clk_get(dev, NULL); if (IS_ERR(dt->clk)) { dev_err(dev, "no clk available\n"); return PTR_ERR(dt->clk); } + + dt->clk_x = devm_clk_get(dev, "nand_x"); + if (IS_ERR(dt->clk_x)) + dt->clk_x = NULL; + + dt->clk_ecc = devm_clk_get(dev, "ecc"); + if (IS_ERR(dt->clk_ecc)) + dt->clk_ecc = NULL; + ret = clk_prepare_enable(dt->clk); if (ret) return ret; - denali->clk_x_rate = clk_get_rate(dt->clk); + ret = clk_prepare_enable(dt->clk_x); + if (ret) + goto out_disable_clk; + + ret = clk_prepare_enable(dt->clk_ecc); + if (ret) + goto out_disable_clk_x; + + if (dt->clk_x) { + denali->clk_x_rate = clk_get_rate(dt->clk_x); + } else { + /* + * Hardcode the clock rates for the backward compatibility. + * This works for both SOCFPGA and UniPhier. + */ + dev_notice(dev, + "necessary clock is missing. default clock rates are used.\n"); + denali->clk_x_rate = 200000000; + } ret = denali_init(denali); if (ret) - goto out_disable_clk; + goto out_disable_clk_ecc; platform_set_drvdata(pdev, dt); return 0; +out_disable_clk_ecc: + clk_disable_unprepare(dt->clk_ecc); +out_disable_clk_x: + clk_disable_unprepare(dt->clk_x); out_disable_clk: clk_disable_unprepare(dt->clk); @@ -144,6 +183,8 @@ static int denali_dt_remove(struct platform_device *pdev) struct denali_dt *dt = platform_get_drvdata(pdev); denali_remove(&dt->denali); + clk_disable_unprepare(dt->clk_ecc); + clk_disable_unprepare(dt->clk_x); clk_disable_unprepare(dt->clk); return 0;