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[209.132.180.67]) by mx.google.com with ESMTP id uc9si10983844pac.94.2014.03.03.07.09.20; Mon, 03 Mar 2014 07:09:20 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755136AbaCCPJN (ORCPT + 26 others); Mon, 3 Mar 2014 10:09:13 -0500 Received: from devils.ext.ti.com ([198.47.26.153]:60548 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755073AbaCCPI4 (ORCPT ); Mon, 3 Mar 2014 10:08:56 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id s23F8M3g022717; Mon, 3 Mar 2014 09:08:22 -0600 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s23F8M0g015783; Mon, 3 Mar 2014 09:08:22 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.174.1; Mon, 3 Mar 2014 09:08:22 -0600 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s23F7Z1G008921; Mon, 3 Mar 2014 09:08:19 -0600 From: Roger Quadros To: , , CC: , , , , , , , , , , Benoit Cousson Subject: [PATCH 12/12] ARM: dts: dra7: add OCP2SCP3 and SATA nodes Date: Mon, 3 Mar 2014 17:07:34 +0200 Message-ID: <1393859254-10937-13-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1393859254-10937-1-git-send-email-rogerq@ti.com> References: <1393859254-10937-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: rogerq@ti.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.179 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Balaji T K Add nodes for OCP2SCP3 bus, SATA controller and SATA PHY. [Roger Q] Clean up. CC: Benoit Cousson Signed-off-by: Balaji T K Signed-off-by: Roger Quadros --- arch/arm/boot/dts/dra7.dtsi | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 1fd75aa..74e44bc 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -621,6 +621,45 @@ dma-names = "tx0", "rx0"; status = "disabled"; }; + + omap_control_sata: control-phy@4a002374 { + compatible = "ti,control-phy-pipe3"; + reg = <0x4a002374 0x4>; + reg-names = "power"; + clocks = <&sys_clkin1>; + clock-names = "sysclk"; + }; + + /* OCP2SCP3 */ + ocp2scp@4a090000 { + compatible = "ti,omap-ocp2scp"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + reg = <0x4a090000 0x20>; + ti,hwmods = "ocp2scp3"; + sata_phy: phy@4A096000 { + compatible = "ti,phy-pipe3-sata"; + reg = <0x4A096000 0x80>, /* phy_rx */ + <0x4A096400 0x64>, /* phy_tx */ + <0x4A096800 0x40>; /* pll_ctrl */ + reg-names = "phy_rx", "phy_tx", "pll_ctrl"; + ctrl-module = <&omap_control_sata>; + clocks = <&sys_clkin1>; + clock-names = "sysclk"; + #phy-cells = <0>; + }; + }; + + sata: sata@4a141100 { + compatible = "snps,dwc-ahci"; + reg = <0x4a140000 0x1100>, <0x4a141100 0x7>; + interrupts = ; + phys = <&sata_phy>; + phy-names = "sata-phy"; + clocks = <&sata_ref_clk>; + ti,hwmods = "sata"; + }; }; };