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[209.132.180.67]) by mx.google.com with ESMTP id ub8si8299307pac.68.2014.03.07.05.10.04; Fri, 07 Mar 2014 05:10:04 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753439AbaCGNJ7 (ORCPT + 26 others); Fri, 7 Mar 2014 08:09:59 -0500 Received: from comal.ext.ti.com ([198.47.26.152]:46370 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752612AbaCGNJ4 (ORCPT ); Fri, 7 Mar 2014 08:09:56 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id s27D9ZP2003651; Fri, 7 Mar 2014 07:09:35 -0600 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s27D9ZwT019493; Fri, 7 Mar 2014 07:09:35 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.174.1; Fri, 7 Mar 2014 07:09:35 -0600 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s27D9Ees003003; Fri, 7 Mar 2014 07:09:32 -0600 From: Roger Quadros To: , CC: , , , , , , , Subject: [PATCH 6/8] ARM: dts: omap4+: Add clocks to USB2 PHY node Date: Fri, 7 Mar 2014 15:09:09 +0200 Message-ID: <1394197751-28984-7-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1394197751-28984-1-git-send-email-rogerq@ti.com> References: <1394197751-28984-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: rogerq@ti.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.171 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The USB2 PHY driver expects named clocks for wakeup clock and reference clock. Provide this information for USB2 PHY nodes in OMAP4 and OMAP5 SoC DTS. Signed-off-by: Roger Quadros --- arch/arm/boot/dts/omap4.dtsi | 2 ++ arch/arm/boot/dts/omap5.dtsi | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 4e15be5..2f6cfa6 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -608,6 +608,8 @@ compatible = "ti,omap-usb2"; reg = <0x4a0ad080 0x58>; ctrl-module = <&omap_control_usb2phy>; + clocks = <&usb_phy_cm_clk32k>; + clock-names = "wkupclk"; #phy-cells = <0>; }; }; diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 521caab..bf629bb 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -769,6 +769,8 @@ compatible = "ti,omap-usb2"; reg = <0x4a084000 0x7c>; ctrl-module = <&omap_control_usb2phy>; + clocks = <&usb_phy_cm_clk32k>, <&usb_otg_ss_refclk960m>; + clock-names = "wkupclk", "refclk"; #phy-cells = <0>; };