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[209.132.180.67]) by mx.google.com with ESMTP id il2si11151393pbc.263.2014.03.25.03.51.41; Tue, 25 Mar 2014 03:51:41 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753989AbaCYKvY (ORCPT + 5 others); Tue, 25 Mar 2014 06:51:24 -0400 Received: from mail-pd0-f170.google.com ([209.85.192.170]:60555 "EHLO mail-pd0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753387AbaCYKvT (ORCPT ); Tue, 25 Mar 2014 06:51:19 -0400 Received: by mail-pd0-f170.google.com with SMTP id v10so276146pde.1 for ; Tue, 25 Mar 2014 03:51:18 -0700 (PDT) X-Received: by 10.66.66.66 with SMTP id d2mr78035073pat.80.1395744678785; Tue, 25 Mar 2014 03:51:18 -0700 (PDT) Received: from localhost.localdomain ([162.243.130.63]) by mx.google.com with ESMTPSA id db3sm42987987pbb.10.2014.03.25.03.51.10 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 25 Mar 2014 03:51:18 -0700 (PDT) From: Alex Shi To: mark.hambleton@broadcom.com, mark.brown@linaro.org, eduardo.valentin@ti.com, mporter@linaro.org, lsk-interest@linaro.org, linaro-kernel@linaro.org Cc: =?UTF-8?q?Beno=C3=AEt=20Cousson?= , Tony Lindgren , Rob Herring , Pawel Moll , Mark Rutland , Stephen Warren , Ian Campbell , Russell King , linux-omap@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Alex Shi Subject: [PATCH 13/19] arm: dts: add omap5 CORE thermal data Date: Tue, 25 Mar 2014 18:49:26 +0800 Message-Id: <1395744572-20014-14-git-send-email-alex.shi@linaro.org> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1395744572-20014-1-git-send-email-alex.shi@linaro.org> References: <1395744572-20014-1-git-send-email-alex.shi@linaro.org> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: alex.shi@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.180 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Eduardo Valentin This patch changes a dtsi file to contain the thermal data for CORE domain on OMAP5 and later SoCs. This data will enable a thermal shutdown at 125C. This thermal data can be reused across TI SoC devices. Cc: "Benoît Cousson" Cc: Tony Lindgren Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Stephen Warren Cc: Ian Campbell Cc: Russell King Cc: linux-omap@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Eduardo Valentin (cherry picked from commit dcb5004fceeb15f0fdfc4a2b8cd68c6ad515a80b) Signed-off-by: Alex Shi --- arch/arm/boot/dts/omap5-core-thermal.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 arch/arm/boot/dts/omap5-core-thermal.dtsi diff --git a/arch/arm/boot/dts/omap5-core-thermal.dtsi b/arch/arm/boot/dts/omap5-core-thermal.dtsi new file mode 100644 index 0000000..19212ac --- /dev/null +++ b/arch/arm/boot/dts/omap5-core-thermal.dtsi @@ -0,0 +1,28 @@ +/* + * Device Tree Source for OMAP543x SoC CORE thermal + * + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * Contact: Eduardo Valentin + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include + +core_thermal: core_thermal { + polling-delay-passive = <250>; /* milliseconds */ + polling-delay = <1000>; /* milliseconds */ + + /* sensor ID */ + thermal-sensors = <&bandgap 2>; + + trips { + core_crit: core_crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; +};