From patchwork Fri Mar 17 08:58:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 95414 Delivered-To: patch@linaro.org Received: by 10.140.89.134 with SMTP id v6csp206878qgd; Fri, 17 Mar 2017 01:59:12 -0700 (PDT) X-Received: by 10.98.113.74 with SMTP id m71mr15538559pfc.231.1489741152895; Fri, 17 Mar 2017 01:59:12 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g130si5699422pfc.191.2017.03.17.01.59.12; Fri, 17 Mar 2017 01:59:12 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751084AbdCQI7L (ORCPT + 4 others); Fri, 17 Mar 2017 04:59:11 -0400 Received: from fllnx209.ext.ti.com ([198.47.19.16]:40011 "EHLO fllnx209.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751021AbdCQI7L (ORCPT ); Fri, 17 Mar 2017 04:59:11 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id v2H8wQ1W010794; Fri, 17 Mar 2017 03:58:26 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1489741106; bh=D9rQVKrs0kKKoeu2KZECBeTxE/5xb99zKdN8t7PqHfY=; h=Subject:To:References:CC:From:Date:In-Reply-To; b=IygultY6fSwdNRGW4rFEjCjXPy+/kndGMI99bI+hegwA/ABcCHLfRwHeOEIpUpRTT XM68lEV4CQJ8LE5dKKCZO+T1Ruhl3v7DqFbkO5VkSphpMPR2migbxF8lSWnB1SClYX nm3JQ5km8Cw49C2bb6y2QbLgOGdkdvh6Qau3aoW4= Received: from DLEE70.ent.ti.com (dlemailx.itg.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v2H8wLFc000469; Fri, 17 Mar 2017 03:58:21 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.294.0; Fri, 17 Mar 2017 03:58:20 -0500 Received: from [192.168.2.6] (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id v2H8wIpo021224; Fri, 17 Mar 2017 03:58:19 -0500 Subject: [PATCH v2 2/4] ARM: OMAP2+ hwmod: Allow modules to disable HW_AUTO To: , References: <1489405996-10718-1-git-send-email-rogerq@ti.com> <1489405996-10718-3-git-send-email-rogerq@ti.com> CC: , , , , From: Roger Quadros Message-ID: <140ff227-f778-7715-93a3-9ff638d03f55@ti.com> Date: Fri, 17 Mar 2017 10:58:18 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.7.0 MIME-Version: 1.0 In-Reply-To: <1489405996-10718-3-git-send-email-rogerq@ti.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org >From fe0a37d5e53381c3f79c6b6cf7915e44789f516f Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Tue, 7 Feb 2017 16:52:57 +0530 Subject: [PATCH 2/4] ARM: OMAP2+ hwmod: Allow modules to disable HW_AUTO Introduce HWMOD_CLKDM_NOAUTO flag that allows the hwmod's clockdomain to be prevented from HW_AUTO while the hwmod is active. This is needed to workaround some modules which don't function correctly with HW_AUTO. e.g. DCAN on DRA7. Signed-off-by: Roger Quadros [nsekhar@ti.com: rebased to v4.9 kernel] Signed-off-by: Sekhar Nori --- v2: - add comment explaining why we don't call clkdm_deny_idle() in _idle() arch/arm/mach-omap2/omap_hwmod.c | 9 +++++++-- arch/arm/mach-omap2/omap_hwmod.h | 5 +++++ 2 files changed, 12 insertions(+), 2 deletions(-) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 0da4f2e..360fded 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -2092,7 +2092,7 @@ static int _enable(struct omap_hwmod *oh) r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) : -EINVAL; - if (oh->clkdm) + if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO)) clkdm_allow_idle(oh->clkdm); if (!r) { @@ -2149,7 +2149,12 @@ static int _idle(struct omap_hwmod *oh) _idle_sysc(oh); _del_initiator_dep(oh, mpu_oh); - if (oh->clkdm) + /* + * If HWMOD_CLKDM_NOAUTO is set then we don't + * deny idle the clkdm again since idle was already denied + * in _enable() + */ + if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO)) clkdm_deny_idle(oh->clkdm); if (oh->flags & HWMOD_BLOCK_WFI) diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h index 9e1c4ed..cda553a 100644 --- a/arch/arm/mach-omap2/omap_hwmod.h +++ b/arch/arm/mach-omap2/omap_hwmod.h @@ -531,6 +531,10 @@ struct omap_hwmod_omap4_prcm { * operate and they need to be handled at the same time as the main_clk. * HWMOD_NO_IDLE: Do not idle the hwmod at all. Useful to handle certain * IPs like CPSW on DRA7, where clocks to this module cannot be disabled. + * HWMOD_CLKDM_NOAUTO: Allows the hwmod's clockdomain to be prevented from + * entering HW_AUTO while hwmod is active. This is needed to workaround + * some modules which don't function correctly with HW_AUTO. For example, + * DCAN on DRA7x SoC needs this to workaround errata i893. */ #define HWMOD_SWSUP_SIDLE (1 << 0) #define HWMOD_SWSUP_MSTANDBY (1 << 1) @@ -548,6 +552,7 @@ struct omap_hwmod_omap4_prcm { #define HWMOD_RECONFIG_IO_CHAIN (1 << 13) #define HWMOD_OPT_CLKS_NEEDED (1 << 14) #define HWMOD_NO_IDLE (1 << 15) +#define HWMOD_CLKDM_NOAUTO (1 << 16) /* * omap_hwmod._int_flags definitions