From patchwork Wed Dec 8 12:46:09 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 522677 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 189EFC43217 for ; Wed, 8 Dec 2021 12:46:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233676AbhLHMt5 (ORCPT ); Wed, 8 Dec 2021 07:49:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45228 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233662AbhLHMt4 (ORCPT ); Wed, 8 Dec 2021 07:49:56 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 40FFBC061746; Wed, 8 Dec 2021 04:46:24 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 00225B81F79; Wed, 8 Dec 2021 12:46:22 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 54F97C341CB; Wed, 8 Dec 2021 12:46:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1638967581; bh=MeirT4xGsKt7osRpBz1wQ0uIbtgu/8LH4Sy26maoJnk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oGlN/97yWbTKVJrFno55L5j1wjZdFwWoeKQGFEQXOjqwa3zlF7HLQ+okCom0Hbz39 RTpYamAOB8dy4f5ha9ZYOOvGOdouOMiFVbEKDnA9DCi9kzDZLGosKSbAFLUWFJKOPd oAXz3T9tVoc8rxQmSRUOrMW/4zmVg525G9crr+ukBwGTPOcKxsgYVBMR3+hCYuEvzj 4ogg/NtJRXgg+CaDaf7OEeH4YBe+rNKy5FijyGQor4g4XD7Rhd0rDTEzwU2lZhZlKs N/+8+gbEGdlPSALYgtLGmstSbFlf4fNBqPY2tpIsC/gMbAkOJaa79vBh6Gt7veA5Sl xMf1ozFpH/7rQ== From: Roger Quadros To: krzysztof.kozlowski@canonical.com, tony@atomide.com Cc: kishon@ti.com, nm@ti.com, vigneshr@ti.com, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Roger Quadros Subject: [PATCH v2 2/4] memory: omap-gpmc: Add support for GPMC on AM64 SoC Date: Wed, 8 Dec 2021 14:46:09 +0200 Message-Id: <20211208124611.16843-2-rogerq@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211208124611.16843-1-rogerq@kernel.org> References: <20211208124611.16843-1-rogerq@kernel.org> Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The TI's AM64 SoC has the GPMC module. Add compatible for it. Traditionally GPMC external addresses have always been mapped to first 1GB physical address. However newer platforms, can have it mapped at different locations. Support this address provision via device tree. Signed-off-by: Roger Quadros --- drivers/memory/omap-gpmc.c | 40 ++++++++++++++++++++++++++++---------- 1 file changed, 30 insertions(+), 10 deletions(-) diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c index be0858bff4d3..624153048182 100644 --- a/drivers/memory/omap-gpmc.c +++ b/drivers/memory/omap-gpmc.c @@ -237,6 +237,7 @@ struct gpmc_device { struct omap3_gpmc_regs context; int nirqs; unsigned int is_suspended:1; + struct resource *data; }; static struct irq_domain *gpmc_irq_domain; @@ -1456,12 +1457,18 @@ static void gpmc_mem_exit(void) } } -static void gpmc_mem_init(void) +static void gpmc_mem_init(struct gpmc_device *gpmc) { int cs; - gpmc_mem_root.start = GPMC_MEM_START; - gpmc_mem_root.end = GPMC_MEM_END; + if (!gpmc->data) { + /* All legacy devices have same data IO window */ + gpmc_mem_root.start = GPMC_MEM_START; + gpmc_mem_root.end = GPMC_MEM_END; + } else { + gpmc_mem_root.start = gpmc->data->start; + gpmc_mem_root.end = gpmc->data->end; + } /* Reserve all regions that has been set up by bootloader */ for (cs = 0; cs < gpmc_cs_num; cs++) { @@ -1888,6 +1895,7 @@ static const struct of_device_id gpmc_dt_ids[] = { { .compatible = "ti,omap3430-gpmc" }, /* omap3430 & omap3630 */ { .compatible = "ti,omap4430-gpmc" }, /* omap4430 & omap4460 & omap543x */ { .compatible = "ti,am3352-gpmc" }, /* am335x devices */ + { .compatible = "ti,am64-gpmc" }, { } }; @@ -2502,13 +2510,25 @@ static int gpmc_probe(struct platform_device *pdev) gpmc->dev = &pdev->dev; platform_set_drvdata(pdev, gpmc); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) - return -ENOENT; + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cfg"); + if (!res) { + /* legacy DT */ + gpmc_base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(gpmc_base)) + return PTR_ERR(gpmc_base); + } else { + gpmc_base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(gpmc_base)) + return PTR_ERR(gpmc_base); + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "data"); + if (!res) { + dev_err(&pdev->dev, "couldn't get data reg resource\n"); + return -ENOENT; + } - gpmc_base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(gpmc_base)) - return PTR_ERR(gpmc_base); + gpmc->data = res; + } res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); if (!res) { @@ -2562,7 +2582,7 @@ static int gpmc_probe(struct platform_device *pdev) dev_info(gpmc->dev, "GPMC revision %d.%d\n", GPMC_REVISION_MAJOR(l), GPMC_REVISION_MINOR(l)); - gpmc_mem_init(); + gpmc_mem_init(gpmc); rc = gpmc_gpio_init(gpmc); if (rc) goto gpio_init_failed;