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[80.251.214.228]) by smtp.gmail.com with ESMTPSA id z24sm18708230pjq.43.2021.08.23.02.56.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Aug 2021 02:56:19 -0700 (PDT) From: Shawn Guo To: Georgi Djakov Cc: AngeloGioacchino Del Regno , Bjorn Andersson , Rob Herring , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, Shawn Guo Subject: [PATCH 0/3] Add missing A2NoC QoS clocks for SDM660 interconnect driver Date: Mon, 23 Aug 2021 17:56:00 +0800 Message-Id: <20210823095603.5538-1-shawn.guo@linaro.org> X-Mailer: git-send-email 2.17.1 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The series updates SDM660 interconnect bindings, driver and device tree to add A2NoC clocks required for QoS registers programming per downstream kernel[1]. Otherwise, qcom_icc_noc_set_qos_priority() call on mas_ufs or mas_usb_hs node will simply result in a hardware hang on SDM660 SoC. [1] https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/sdm660-bus.dtsi?h=LA.UM.8.2.r1-04800-sdm660.0#n43 Shawn Guo (3): dt-bindings: interconnect: sdm660: Add missing a2noc qos clocks interconnect: qcom: sdm660: Add missing a2noc qos clocks arm64: dts: qcom: sdm630: Add missing a2noc qos clocks .../bindings/interconnect/qcom,sdm660.yaml | 41 ++++++++++++++++++- arch/arm64/boot/dts/qcom/sdm630.dtsi | 17 ++++++-- drivers/interconnect/qcom/sdm660.c | 14 +++++++ 3 files changed, 67 insertions(+), 5 deletions(-) -- 2.17.1