[0/2] Add interconnect support for QCS8300 SoC

Message ID	20240827151622.305-1-quic_rlaggysh@quicinc.com
Headers	show Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AD12B1C6891; Tue, 27 Aug 2024 15:16:55 +0000 (UTC) From: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com> To: Georgi Djakov <djakov@kernel.org>, Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org> CC: Konrad Dybcio <konradybcio@kernel.org>, Danila Tikhonov <danila@jiaxyga.com>, Neil Armstrong <neil.armstrong@linaro.org>, "Vladimir Lypak" <vladimir.lypak@gmail.com>, Adam Skladowski <a39.skl@gmail.com>, "Sibi Sankar" <quic_sibis@quicinc.com>, Rohit Agarwal <quic_rohiagar@quicinc.com>, Rajendra Nayak <quic_rjendra@quicinc.com>, Andrew Halaney <ahalaney@redhat.com>, <linux-arm-msm@vger.kernel.org>, <linux-pm@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <quic_mdtipton@quicinc.com>, <quic_okukatla@quicinc.com>, Raviteja Laggyshetty <quic_rlaggysh@quicinc.com> Subject: [PATCH 0/2] Add interconnect support for QCS8300 SoC Date: Tue, 27 Aug 2024 15:16:20 +0000 Message-ID: <20240827151622.305-1-quic_rlaggysh@quicinc.com> Precedence: bulk MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain
Series	Add interconnect support for QCS8300 SoC \| expand [0/2] Add interconnect support for QCS8300 SoC [1/2] dt-bindings: interconnect: Add Qualcomm QCS8300 DT bindings [2/2] interconnect: qcom: add QCS8300 interconnect provider driver

Message ID

20240827151622.305-1-quic_rlaggysh@quicinc.com

Headers

From: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
To: Georgi Djakov <djakov@kernel.org>, Rob Herring <robh@kernel.org>,
        Krzysztof Kozlowski <krzk+dt@kernel.org>,
        Conor Dooley <conor+dt@kernel.org>
CC: Konrad Dybcio <konradybcio@kernel.org>,
        Danila Tikhonov
	<danila@jiaxyga.com>,
        Neil Armstrong <neil.armstrong@linaro.org>,
        "Vladimir
 Lypak" <vladimir.lypak@gmail.com>,
        Adam Skladowski <a39.skl@gmail.com>,
        "Sibi
 Sankar" <quic_sibis@quicinc.com>,
        Rohit Agarwal <quic_rohiagar@quicinc.com>,
        Rajendra Nayak <quic_rjendra@quicinc.com>,
        Andrew Halaney
	<ahalaney@redhat.com>, <linux-arm-msm@vger.kernel.org>,
        <linux-pm@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, <quic_mdtipton@quicinc.com>,
        <quic_okukatla@quicinc.com>,
        Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
Subject: [PATCH 0/2] Add interconnect support for QCS8300 SoC
Date: Tue, 27 Aug 2024 15:16:20 +0000
Message-ID: <20240827151622.305-1-quic_rlaggysh@quicinc.com>
Precedence: bulk
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Content-Type: text/plain

Series

Add interconnect support for QCS8300 SoC | expand

Message

Raviteja Laggyshetty Aug. 27, 2024, 3:16 p.m. UTC

Add interconnect dtbindings and driver support for Qualcomm QCS8300 SoC.

Raviteja Laggyshetty (2):
  dt-bindings: interconnect: Add Qualcomm QCS8300 DT bindings
  interconnect: qcom: add QCS8300 interconnect provider driver

 .../interconnect/qcom,qcs8300-rpmh.yaml       |   52 +
 drivers/interconnect/qcom/Kconfig             |   11 +
 drivers/interconnect/qcom/Makefile            |    2 +
 drivers/interconnect/qcom/qcs8300.c           | 2093 +++++++++++++++++
 drivers/interconnect/qcom/qcs8300.h           |  177 ++
 .../interconnect/qcom,qcs8300-rpmh.h          |  189 ++
 6 files changed, 2524 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,qcs8300-rpmh.yaml
 create mode 100644 drivers/interconnect/qcom/qcs8300.c
 create mode 100644 drivers/interconnect/qcom/qcs8300.h
 create mode 100644 include/dt-bindings/interconnect/qcom,qcs8300-rpmh.h