From patchwork Thu Feb 26 13:21:39 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 45175 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-wg0-f72.google.com (mail-wg0-f72.google.com [74.125.82.72]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 633192043C for ; Thu, 26 Feb 2015 13:23:05 +0000 (UTC) Received: by wghb13 with SMTP id b13sf8012987wgh.2 for ; Thu, 26 Feb 2015 05:23:04 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=IV24F2GMPW9IZIQ3Dgs4XjtXmWQudL9D3R024xCQ7Zs=; b=FsZIQzNdHIa/JIuGTXhUgyNvvhBpeZ5JnAzbzuO/A3RUh35220jcV8UxlwcZlrm8kx hv6K9hHver1RuLdXkqlMoW4TPNh6u6FFcXonjFdIoUn9PFh3jV/hOf+2A8h0aQ/oszqh echPDz/12ANSsjw22RF1mH+YpTMsTTltcHzPCregTfbgvZIeF73TCe3rE2KgBx8WgNWN lBRKhUwrrjfQ3sLIrbIPYJ+U4SOhznEGIg3MXAkmai2Ijc9SdptTkxQ8VjCmnL9o9phi UXoMx8l0oBN9R6AgBzXMQZyHE8tz7EtlKAs/NAlGAL2sJNSJBe7bl4WPa1/aqMT/lAQX X9jQ== X-Gm-Message-State: ALoCoQnxSHrJM8gTpx+w52zWfdiJUJIfrthDzNGjBmqTYUgBb6Yg4zdCq6+Mv+FSqOa3RWeOyJnd X-Received: by 10.112.145.133 with SMTP id su5mr1267403lbb.17.1424956984665; Thu, 26 Feb 2015 05:23:04 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.43.169 with SMTP id x9ls30894lal.108.gmail; Thu, 26 Feb 2015 05:23:04 -0800 (PST) X-Received: by 10.152.206.70 with SMTP id lm6mr7596426lac.35.1424956984486; Thu, 26 Feb 2015 05:23:04 -0800 (PST) Received: from mail-la0-f41.google.com (mail-la0-f41.google.com. [209.85.215.41]) by mx.google.com with ESMTPS id dv9si538573lbc.147.2015.02.26.05.23.04 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 Feb 2015 05:23:04 -0800 (PST) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.41 as permitted sender) client-ip=209.85.215.41; Received: by lamq1 with SMTP id q1so10900398lam.5 for ; Thu, 26 Feb 2015 05:23:04 -0800 (PST) X-Received: by 10.152.206.70 with SMTP id lm6mr7596419lac.35.1424956984354; Thu, 26 Feb 2015 05:23:04 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.35.133 with SMTP id h5csp3296059lbj; Thu, 26 Feb 2015 05:23:03 -0800 (PST) X-Received: by 10.66.66.238 with SMTP id i14mr14819360pat.27.1424956981975; Thu, 26 Feb 2015 05:23:01 -0800 (PST) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id sn7si1213234pac.49.2015.02.26.05.23.00; Thu, 26 Feb 2015 05:23:01 -0800 (PST) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932438AbbBZNW4 (ORCPT + 28 others); Thu, 26 Feb 2015 08:22:56 -0500 Received: from mail-pa0-f52.google.com ([209.85.220.52]:46249 "EHLO mail-pa0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753689AbbBZNWy (ORCPT ); Thu, 26 Feb 2015 08:22:54 -0500 Received: by pabkx10 with SMTP id kx10so13857922pab.13 for ; Thu, 26 Feb 2015 05:22:53 -0800 (PST) X-Received: by 10.68.100.99 with SMTP id ex3mr5649812pbb.7.1424956973796; Thu, 26 Feb 2015 05:22:53 -0800 (PST) Received: from localhost.localdomain ([180.150.157.4]) by mx.google.com with ESMTPSA id g7sm1117723pdm.4.2015.02.26.05.22.50 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 26 Feb 2015 05:22:53 -0800 (PST) From: Leo Yan To: "Rafael J . Wysocki" , Viresh Kumar , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Dan Zhao , zhenwei.wang@hisilicon.com, mohaoju@hisilicon.com Cc: Leo Yan Subject: [PATCH 2/2] dt-bindings: cpufreq: document for hisilicon acpu driver Date: Thu, 26 Feb 2015 21:21:39 +0800 Message-Id: <1424956899-8891-3-git-send-email-leo.yan@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1424956899-8891-1-git-send-email-leo.yan@linaro.org> References: <1424956899-8891-1-git-send-email-leo.yan@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: leo.yan@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.41 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This adds documentation for hisilicon acpu's cpufreq driver. OPP library is used for device tree parsing to get frequency list; Furthermore, this driver can bind all CPUs to change frequency together, or the two clusters can trigger the frequency change independently. This is controlled by the dtb flag "hisilicon,coupled-clusters". Signed-off-by: Leo Yan --- .../bindings/cpufreq/cpufreq-hisi-acpu.txt | 112 +++++++++++++++++++++ 1 file changed, 112 insertions(+) create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-hisi-acpu.txt diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-hisi-acpu.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-hisi-acpu.txt new file mode 100644 index 0000000..547e7339 --- /dev/null +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-hisi-acpu.txt @@ -0,0 +1,112 @@ +Hisilicon acpu cpufreq driver +----------------------------- + +Hisilicon ACPU cpufreq driver for CPU frequency scaling. + +Required properties: +- operating-points: Table of frequencies and voltage CPU could be transitioned + into. Frequency should be in KHz units and voltage should be in + microvolts; This must be defined under node /cpus/cpu@x. Where x is + the first cpu inside a cluster. + +Optional properties: +- hisilicon,coupled-clusters: Specify whether all clusters share one clock + source. This must be defined under node cpufreq. + +Example 1: all clusters share one clock source +---------------------------------------------- + +cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "arm,cortex-a53", "arm,armv8"; + device_type = "cpu"; + reg = <0x0 0x0>; + operating-points = < + /* kHz uV */ + 1200000 0 + 960000 0 + 729000 0 + 432000 0 + 208000 0 + >; + }; + + cpu@1 { + compatible = "arm,cortex-a53", "arm,armv8"; + device_type = "cpu"; + reg = <0x0 0x1>; + }; + + cpu@100 { + compatible = "arm,cortex-a53", "arm,armv8"; + device_type = "cpu"; + reg = <0x0 0x100>; + }; + + cpu@101 { + compatible = "arm,cortex-a53", "arm,armv8"; + device_type = "cpu"; + reg = <0x0 0x101>; + }; +}; + +cpufreq { + compatible = "hisilicon,hisi-acpu-cpufreq"; + hisilicon,coupled-clusters = <1>; +}; + + +Example 2: every cluster has dedicated clock source +--------------------------------------------------- + +cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "arm,cortex-a53", "arm,armv8"; + device_type = "cpu"; + reg = <0x0 0x0>; + operating-points = < + /* kHz uV */ + 1200000 0 + 960000 0 + 729000 0 + 432000 0 + 208000 0 + >; + }; + + cpu@1 { + compatible = "arm,cortex-a53", "arm,armv8"; + device_type = "cpu"; + reg = <0x0 0x1>; + }; + + cpu@100 { + compatible = "arm,cortex-a53", "arm,armv8"; + device_type = "cpu"; + reg = <0x0 0x100>; + operating-points = < + /* kHz uV */ + 1200000 0 + 960000 0 + 729000 0 + 432000 0 + 208000 0 + >; + }; + + cpu@101 { + compatible = "arm,cortex-a53", "arm,armv8"; + device_type = "cpu"; + reg = <0x0 0x101>; + }; +}; + +cpufreq { + compatible = "hisilicon,hisi-acpu-cpufreq"; +};