From patchwork Tue Nov 10 08:39:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Giovanni Gherdovich X-Patchwork-Id: 321715 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A2EC9C388F7 for ; Tue, 10 Nov 2020 08:40:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5E9F220780 for ; Tue, 10 Nov 2020 08:40:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729584AbgKJIjx (ORCPT ); Tue, 10 Nov 2020 03:39:53 -0500 Received: from mx2.suse.de ([195.135.220.15]:48576 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728403AbgKJIju (ORCPT ); Tue, 10 Nov 2020 03:39:50 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 6646BAE1F; Tue, 10 Nov 2020 08:39:48 +0000 (UTC) From: Giovanni Gherdovich To: Borislav Petkov , Thomas Gleixner , Ingo Molnar , Peter Zijlstra , Len Brown , "Rafael J . Wysocki" Cc: Jon Grimm , Nathan Fontenot , Yazen Ghannam , Thomas Lendacky , Mel Gorman , Pu Wen , Viresh Kumar , Juri Lelli , Vincent Guittot , Dietmar Eggemann , Doug Smythies , x86@kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, Nathan Fontenot , Giovanni Gherdovich Subject: [PATCH 1/3] x86, sched: Calculate frequency invariance for AMD systems Date: Tue, 10 Nov 2020 09:39:34 +0100 Message-Id: <20201110083936.31994-2-ggherdovich@suse.cz> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201110083936.31994-1-ggherdovich@suse.cz> References: <20201110083936.31994-1-ggherdovich@suse.cz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Nathan Fontenot This is the first pass in creating the ability to calculate the frequency invariance on AMD systems. This approach uses the CPPC highest performance and nominal performance values that range from 0 - 255 instead of a high and base frquency. This is because we do not have the ability on AMD to get a highest frequency value. On AMD systems the highest performance and nominal performance vaues do correspond to the highest and base frequencies for the system so using them should produce an appropriate ratio but some tweaking is likely necessary. Due to CPPC being initialized later in boot than when the frequency invariant calculation is currently made, I had to create a callback from the CPPC init code to do the calculation after we have CPPC data. Signed-off-by: Nathan Fontenot [ ggherdovich@suse.cz: cosmetic changes ] Signed-off-by: Giovanni Gherdovich --- arch/x86/include/asm/topology.h | 8 ++++ arch/x86/kernel/smpboot.c | 76 +++++++++++++++++++++++++++++---- drivers/acpi/cppc_acpi.c | 5 +++ 3 files changed, 81 insertions(+), 8 deletions(-) diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h index f4234575f3fd..9799d4da282d 100644 --- a/arch/x86/include/asm/topology.h +++ b/arch/x86/include/asm/topology.h @@ -218,4 +218,12 @@ static inline void arch_set_max_freq_ratio(bool turbo_disabled) } #endif +#ifdef CONFIG_ACPI +void init_freq_invariance_cppc(void); +#else +static inline void init_freq_invariance_cppc(void) +{ +} +#endif + #endif /* _ASM_X86_TOPOLOGY_H */ diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index de776b2e6046..89016cc96948 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -82,6 +82,10 @@ #include #include +#ifdef CONFIG_ACPI +#include +#endif + /* representing HT siblings of each logical CPU */ DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_sibling_map); EXPORT_PER_CPU_SYMBOL(cpu_sibling_map); @@ -148,7 +152,7 @@ static inline void smpboot_restore_warm_reset_vector(void) *((volatile u32 *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) = 0; } -static void init_freq_invariance(bool secondary); +static void init_freq_invariance(bool secondary, bool cppc_ready); /* * Report back to the Boot Processor during boot time or to the caller processor @@ -186,7 +190,7 @@ static void smp_callin(void) */ set_cpu_sibling_map(raw_smp_processor_id()); - init_freq_invariance(true); + init_freq_invariance(true, false); /* * Get our bogomips. @@ -1340,7 +1344,7 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus) set_sched_topology(x86_topology); set_cpu_sibling_map(0); - init_freq_invariance(false); + init_freq_invariance(false, false); smp_sanity_check(); switch (apic_intr_mode) { @@ -2027,7 +2031,47 @@ static bool intel_set_max_freq_ratio(void) return true; } -static void init_counter_refs(void) +#ifdef CONFIG_ACPI +static bool amd_set_max_freq_ratio(void) +{ + struct cppc_perf_caps perf_caps; + u64 highest_perf, nominal_perf; + u64 perf_ratio; + int rc; + + rc = cppc_get_perf_caps(0, &perf_caps); + if (rc) { + pr_debug("Could not retrieve perf counters (%d)\n", rc); + return false; + } + + highest_perf = perf_caps.highest_perf; + nominal_perf = perf_caps.nominal_perf; + + if (!highest_perf || !nominal_perf) { + pr_debug("Could not retrieve highest or nominal performance\n"); + return false; + } + + perf_ratio = div_u64(highest_perf * SCHED_CAPACITY_SCALE, nominal_perf); + if (!perf_ratio) { + pr_debug("Non-zero highest/nominal perf values led to a 0 ratio\n"); + return false; + } + + arch_turbo_freq_ratio = perf_ratio; + arch_set_max_freq_ratio(false); + + return true; +} +#else +static bool amd_set_max_freq_ratio(void) +{ + return false; +} +#endif + +static void init_counter_refs(void *arg) { u64 aperf, mperf; @@ -2038,7 +2082,7 @@ static void init_counter_refs(void) this_cpu_write(arch_prev_mperf, mperf); } -static void init_freq_invariance(bool secondary) +static void init_freq_invariance(bool secondary, bool cppc_ready) { bool ret = false; @@ -2047,22 +2091,38 @@ static void init_freq_invariance(bool secondary) if (secondary) { if (static_branch_likely(&arch_scale_freq_key)) { - init_counter_refs(); + init_counter_refs(NULL); } return; } if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) ret = intel_set_max_freq_ratio(); + else if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) { + if (!cppc_ready) { + return; + } + ret = amd_set_max_freq_ratio(); + } if (ret) { - init_counter_refs(); + init_counter_refs(NULL); static_branch_enable(&arch_scale_freq_key); } else { pr_debug("Couldn't determine max cpu frequency, necessary for scale-invariant accounting.\n"); } } +#ifdef CONFIG_ACPI +void init_freq_invariance_cppc(void) +{ + init_freq_invariance(false, true); + + if (static_branch_likely(&arch_scale_freq_key)) + on_each_cpu(init_counter_refs, NULL, 0); +} +#endif + static void disable_freq_invariance_workfn(struct work_struct *work) { static_branch_disable(&arch_scale_freq_key); @@ -2112,7 +2172,7 @@ void arch_scale_freq_tick(void) schedule_work(&disable_freq_invariance_work); } #else -static inline void init_freq_invariance(bool secondary) +static inline void init_freq_invariance(bool secondary, bool cppc_ready) { } #endif /* CONFIG_X86_64 */ diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c index 7a99b19bb893..e1969ff876ff 100644 --- a/drivers/acpi/cppc_acpi.c +++ b/drivers/acpi/cppc_acpi.c @@ -39,6 +39,7 @@ #include #include #include +#include #include @@ -850,6 +851,10 @@ int acpi_cppc_processor_probe(struct acpi_processor *pr) goto out_free; } + /* Only needed once, so call on CPU0 */ + if (pr->id == 0) + init_freq_invariance_cppc(); + kfree(output.pointer); return 0;