| Message ID | 20230124131717.128660-3-bchihi@baylibre.com |
|---|---|
| State | New |
| Headers | show |
| Series | Add LVTS thermal architecture | expand |
On 24/01/2023 14:17, bchihi@baylibre.com wrote: > From: Balsam CHIHI <bchihi@baylibre.com> > > Add LVTS thermal controllers dt-binding definition for mt8195. > > Signed-off-by: Balsam CHIHI <bchihi@baylibre.com> > --- Krzysztof, Rob, are you ok with these changes ? > .../thermal/mediatek,lvts-thermal.yaml | 107 ++++++++++++++++++ > include/dt-bindings/thermal/mediatek-lvts.h | 19 ++++ > 2 files changed, 126 insertions(+) > create mode 100644 Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml > create mode 100644 include/dt-bindings/thermal/mediatek-lvts.h > > diff --git a/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml > new file mode 100644 > index 000000000000..12bfbdd8ff89 > --- /dev/null > +++ b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml > @@ -0,0 +1,107 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/thermal/mediatek,lvts-thermal.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: MediaTek SoC Low Voltage Thermal Sensor (LVTS) > + > +maintainers: > + - Balsam CHIHI <bchihi@baylibre.com> > + > +description: | > + LVTS is a thermal management architecture composed of three subsystems, > + a Sensing device - Thermal Sensing Micro Circuit Unit (TSMCU), > + a Converter - Low Voltage Thermal Sensor converter (LVTS), and > + a Digital controller (LVTS_CTRL). > + > +properties: > + compatible: > + enum: > + - mediatek,mt8195-lvts-ap > + - mediatek,mt8195-lvts-mcu > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + resets: > + maxItems: 1 > + description: LVTS reset for clearing temporary data on AP/MCU. > + > + nvmem-cells: > + minItems: 1 > + items: > + - description: Calibration eFuse data 1 for LVTS > + - description: Calibration eFuse data 2 for LVTS > + > + nvmem-cell-names: > + minItems: 1 > + items: > + - const: lvts-calib-data-1 > + - const: lvts-calib-data-2 > + > + "#thermal-sensor-cells": > + const: 1 > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + - resets > + - nvmem-cells > + - nvmem-cell-names > + - "#thermal-sensor-cells" > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/clock/mt8195-clk.h> > + #include <dt-bindings/reset/mt8195-resets.h> > + #include <dt-bindings/thermal/mediatek-lvts.h> > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + > + lvts_mcu: thermal-sensor@11278000 { > + compatible = "mediatek,mt8195-lvts-mcu"; > + reg = <0 0x11278000 0 0x1000>; > + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>; > + clocks = <&infracfg_ao CLK_INFRA_AO_THERM>; > + resets = <&infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST>; > + nvmem-cells = <&lvts_efuse_data1 &lvts_efuse_data2>; > + nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2"; > + #thermal-sensor-cells = <1>; > + }; > + }; > + > + thermal_zones: thermal-zones { > + cpu0-thermal { > + polling-delay = <1000>; > + polling-delay-passive = <250>; > + thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU0>; > + > + trips { > + cpu0_alert: trip-alert { > + temperature = <85000>; > + hysteresis = <2000>; > + type = "passive"; > + }; > + > + cpu0_crit: trip-crit { > + temperature = <100000>; > + hysteresis = <2000>; > + type = "critical"; > + }; > + }; > + }; > + }; > diff --git a/include/dt-bindings/thermal/mediatek-lvts.h b/include/dt-bindings/thermal/mediatek-lvts.h > new file mode 100644 > index 000000000000..428a95c18509 > --- /dev/null > +++ b/include/dt-bindings/thermal/mediatek-lvts.h > @@ -0,0 +1,19 @@ > +/* SPDX-License-Identifier: GPL-2.0+ */ > +/* > + * Copyright (c) 2023 MediaTek Inc. > + * Author: Balsam CHIHI <bchihi@baylibre.com> > + */ > + > +#ifndef __MEDIATEK_LVTS_DT_H > +#define __MEDIATEK_LVTS_DT_H > + > +#define MT8195_MCU_BIG_CPU0 0 > +#define MT8195_MCU_BIG_CPU1 1 > +#define MT8195_MCU_BIG_CPU2 2 > +#define MT8195_MCU_BIG_CPU3 3 > +#define MT8195_MCU_LITTLE_CPU0 4 > +#define MT8195_MCU_LITTLE_CPU1 5 > +#define MT8195_MCU_LITTLE_CPU2 6 > +#define MT8195_MCU_LITTLE_CPU3 7 > + > +#endif /* __MEDIATEK_LVTS_DT_H */
On Tue, Jan 24, 2023 at 02:17:13PM +0100, bchihi@baylibre.com wrote: > From: Balsam CHIHI <bchihi@baylibre.com> > dt-bindings: thermal: ... for the subject > Add LVTS thermal controllers dt-binding definition for mt8195. > > Signed-off-by: Balsam CHIHI <bchihi@baylibre.com> > --- > .../thermal/mediatek,lvts-thermal.yaml | 107 ++++++++++++++++++ > include/dt-bindings/thermal/mediatek-lvts.h | 19 ++++ > 2 files changed, 126 insertions(+) > create mode 100644 Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml > create mode 100644 include/dt-bindings/thermal/mediatek-lvts.h > > diff --git a/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml > new file mode 100644 > index 000000000000..12bfbdd8ff89 > --- /dev/null > +++ b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml > @@ -0,0 +1,107 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/thermal/mediatek,lvts-thermal.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: MediaTek SoC Low Voltage Thermal Sensor (LVTS) > + > +maintainers: > + - Balsam CHIHI <bchihi@baylibre.com> > + > +description: | > + LVTS is a thermal management architecture composed of three subsystems, > + a Sensing device - Thermal Sensing Micro Circuit Unit (TSMCU), > + a Converter - Low Voltage Thermal Sensor converter (LVTS), and > + a Digital controller (LVTS_CTRL). > + > +properties: > + compatible: > + enum: > + - mediatek,mt8195-lvts-ap > + - mediatek,mt8195-lvts-mcu > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + resets: > + maxItems: 1 > + description: LVTS reset for clearing temporary data on AP/MCU. > + > + nvmem-cells: > + minItems: 1 > + items: > + - description: Calibration eFuse data 1 for LVTS > + - description: Calibration eFuse data 2 for LVTS > + > + nvmem-cell-names: > + minItems: 1 > + items: > + - const: lvts-calib-data-1 > + - const: lvts-calib-data-2 > + > + "#thermal-sensor-cells": > + const: 1 > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + - resets > + - nvmem-cells > + - nvmem-cell-names > + - "#thermal-sensor-cells" > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/clock/mt8195-clk.h> > + #include <dt-bindings/reset/mt8195-resets.h> > + #include <dt-bindings/thermal/mediatek-lvts.h> > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + > + lvts_mcu: thermal-sensor@11278000 { > + compatible = "mediatek,mt8195-lvts-mcu"; > + reg = <0 0x11278000 0 0x1000>; > + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>; > + clocks = <&infracfg_ao CLK_INFRA_AO_THERM>; > + resets = <&infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST>; > + nvmem-cells = <&lvts_efuse_data1 &lvts_efuse_data2>; > + nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2"; > + #thermal-sensor-cells = <1>; > + }; > + }; > + > + thermal_zones: thermal-zones { > + cpu0-thermal { > + polling-delay = <1000>; > + polling-delay-passive = <250>; > + thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU0>; > + > + trips { > + cpu0_alert: trip-alert { > + temperature = <85000>; > + hysteresis = <2000>; > + type = "passive"; > + }; > + > + cpu0_crit: trip-crit { > + temperature = <100000>; > + hysteresis = <2000>; > + type = "critical"; > + }; > + }; > + }; > + }; > diff --git a/include/dt-bindings/thermal/mediatek-lvts.h b/include/dt-bindings/thermal/mediatek-lvts.h > new file mode 100644 > index 000000000000..428a95c18509 > --- /dev/null > +++ b/include/dt-bindings/thermal/mediatek-lvts.h > @@ -0,0 +1,19 @@ > +/* SPDX-License-Identifier: GPL-2.0+ */ Okay with GPL 4? GPL-2.0-only Dual license please. Consistent with your .dts files. > +/* > + * Copyright (c) 2023 MediaTek Inc. > + * Author: Balsam CHIHI <bchihi@baylibre.com> > + */ > + > +#ifndef __MEDIATEK_LVTS_DT_H > +#define __MEDIATEK_LVTS_DT_H > + > +#define MT8195_MCU_BIG_CPU0 0 > +#define MT8195_MCU_BIG_CPU1 1 > +#define MT8195_MCU_BIG_CPU2 2 > +#define MT8195_MCU_BIG_CPU3 3 > +#define MT8195_MCU_LITTLE_CPU0 4 > +#define MT8195_MCU_LITTLE_CPU1 5 > +#define MT8195_MCU_LITTLE_CPU2 6 > +#define MT8195_MCU_LITTLE_CPU3 7 > + > +#endif /* __MEDIATEK_LVTS_DT_H */ > -- > 2.34.1 >
On Wed, Jan 25, 2023 at 12:14:17PM +0100, Daniel Lezcano wrote: > On 24/01/2023 14:17, bchihi@baylibre.com wrote: > > From: Balsam CHIHI <bchihi@baylibre.com> > > > > Add LVTS thermal controllers dt-binding definition for mt8195. > > > > Signed-off-by: Balsam CHIHI <bchihi@baylibre.com> > > --- > > Krzysztof, Rob, > > are you ok with these changes ? It says v11, but I sure don't recall the 10 other versions... Rob
On 25/01/2023 21:35, Rob Herring wrote: > On Wed, Jan 25, 2023 at 12:14:17PM +0100, Daniel Lezcano wrote: >> On 24/01/2023 14:17, bchihi@baylibre.com wrote: >>> From: Balsam CHIHI <bchihi@baylibre.com> >>> >>> Add LVTS thermal controllers dt-binding definition for mt8195. >>> >>> Signed-off-by: Balsam CHIHI <bchihi@baylibre.com> >>> --- >> >> Krzysztof, Rob, >> >> are you ok with these changes ? > > It says v11, but I sure don't recall the 10 other versions... Ah, yes indeed. I remember Krzysztof told Balsam to fix the recipient list because some maintainers were missing.
Hi Rob, On Wed, Jan 25, 2023 at 9:34 PM Rob Herring <robh@kernel.org> wrote: > > On Tue, Jan 24, 2023 at 02:17:13PM +0100, bchihi@baylibre.com wrote: > > From: Balsam CHIHI <bchihi@baylibre.com> > > > > dt-bindings: thermal: ... for the subject I will fix it. > > > Add LVTS thermal controllers dt-binding definition for mt8195. > > > > Signed-off-by: Balsam CHIHI <bchihi@baylibre.com> > > --- > > .../thermal/mediatek,lvts-thermal.yaml | 107 ++++++++++++++++++ > > include/dt-bindings/thermal/mediatek-lvts.h | 19 ++++ > > 2 files changed, 126 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml > > create mode 100644 include/dt-bindings/thermal/mediatek-lvts.h > > > > diff --git a/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml > > new file mode 100644 > > index 000000000000..12bfbdd8ff89 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml > > @@ -0,0 +1,107 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/thermal/mediatek,lvts-thermal.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: MediaTek SoC Low Voltage Thermal Sensor (LVTS) > > + > > +maintainers: > > + - Balsam CHIHI <bchihi@baylibre.com> > > + > > +description: | > > + LVTS is a thermal management architecture composed of three subsystems, > > + a Sensing device - Thermal Sensing Micro Circuit Unit (TSMCU), > > + a Converter - Low Voltage Thermal Sensor converter (LVTS), and > > + a Digital controller (LVTS_CTRL). > > + > > +properties: > > + compatible: > > + enum: > > + - mediatek,mt8195-lvts-ap > > + - mediatek,mt8195-lvts-mcu > > + > > + reg: > > + maxItems: 1 > > + > > + interrupts: > > + maxItems: 1 > > + > > + clocks: > > + maxItems: 1 > > + > > + resets: > > + maxItems: 1 > > + description: LVTS reset for clearing temporary data on AP/MCU. > > + > > + nvmem-cells: > > + minItems: 1 > > + items: > > + - description: Calibration eFuse data 1 for LVTS > > + - description: Calibration eFuse data 2 for LVTS > > + > > + nvmem-cell-names: > > + minItems: 1 > > + items: > > + - const: lvts-calib-data-1 > > + - const: lvts-calib-data-2 > > + > > + "#thermal-sensor-cells": > > + const: 1 > > + > > +required: > > + - compatible > > + - reg > > + - interrupts > > + - clocks > > + - resets > > + - nvmem-cells > > + - nvmem-cell-names > > + - "#thermal-sensor-cells" > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include <dt-bindings/interrupt-controller/arm-gic.h> > > + #include <dt-bindings/clock/mt8195-clk.h> > > + #include <dt-bindings/reset/mt8195-resets.h> > > + #include <dt-bindings/thermal/mediatek-lvts.h> > > + > > + soc { > > + #address-cells = <2>; > > + #size-cells = <2>; > > + > > + lvts_mcu: thermal-sensor@11278000 { > > + compatible = "mediatek,mt8195-lvts-mcu"; > > + reg = <0 0x11278000 0 0x1000>; > > + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>; > > + clocks = <&infracfg_ao CLK_INFRA_AO_THERM>; > > + resets = <&infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST>; > > + nvmem-cells = <&lvts_efuse_data1 &lvts_efuse_data2>; > > + nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2"; > > + #thermal-sensor-cells = <1>; > > + }; > > + }; > > + > > + thermal_zones: thermal-zones { > > + cpu0-thermal { > > + polling-delay = <1000>; > > + polling-delay-passive = <250>; > > + thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU0>; > > + > > + trips { > > + cpu0_alert: trip-alert { > > + temperature = <85000>; > > + hysteresis = <2000>; > > + type = "passive"; > > + }; > > + > > + cpu0_crit: trip-crit { > > + temperature = <100000>; > > + hysteresis = <2000>; > > + type = "critical"; > > + }; > > + }; > > + }; > > + }; > > diff --git a/include/dt-bindings/thermal/mediatek-lvts.h b/include/dt-bindings/thermal/mediatek-lvts.h > > new file mode 100644 > > index 000000000000..428a95c18509 > > --- /dev/null > > +++ b/include/dt-bindings/thermal/mediatek-lvts.h > > @@ -0,0 +1,19 @@ > > +/* SPDX-License-Identifier: GPL-2.0+ */ > > Okay with GPL 4? GPL-2.0-only > > Dual license please. Consistent with your .dts files. I will fix this too. > > > +/* > > + * Copyright (c) 2023 MediaTek Inc. > > + * Author: Balsam CHIHI <bchihi@baylibre.com> > > + */ > > + > > +#ifndef __MEDIATEK_LVTS_DT_H > > +#define __MEDIATEK_LVTS_DT_H > > + > > +#define MT8195_MCU_BIG_CPU0 0 > > +#define MT8195_MCU_BIG_CPU1 1 > > +#define MT8195_MCU_BIG_CPU2 2 > > +#define MT8195_MCU_BIG_CPU3 3 > > +#define MT8195_MCU_LITTLE_CPU0 4 > > +#define MT8195_MCU_LITTLE_CPU1 5 > > +#define MT8195_MCU_LITTLE_CPU2 6 > > +#define MT8195_MCU_LITTLE_CPU3 7 > > + > > +#endif /* __MEDIATEK_LVTS_DT_H */ > > -- > > 2.34.1 > > Thank you for the review. Best regards, Balsam
Hi Rob, I think Balsam took into account your comments. Is it fine for you ? On 26/01/2023 17:10, bchihi@baylibre.com wrote: > From: Balsam CHIHI <bchihi@baylibre.com> > > Add LVTS thermal controllers dt-binding definition for mt8195. > > Signed-off-by: Balsam CHIHI <bchihi@baylibre.com> > --- > Changelog: > v12: > - Fixed subject prefix > - Fixed licences GPL-2.0+ to GPL-2.0 > - Added dual licenses > v11: > - Rebase on top of "thermal/linux-next" : > base=0d568e144ead70189e7f16066dcb155b78ff9266 > - Remove unsupported SoC (mt8192) from dt-binding definition > v10: > - Rebase on top of "thermal/linux-next" : thermal-v6.3-rc1 > v9: > - Rebase on top of 6.0.0-rc1 > - Update dt-bindings : > - Add "allOf:if:then:" > - Use mt8192 as example (instead of mt8195) > - Fix dt-binding errors > - Fix DTS errors > v8: > - Fix coding style issues > - Rebase on top of next-20220803 > - Add multi-instance support : > - Rewrite DT-binding and DTS : > - Add DT-binding and DTS for LVTS_v4 (MT8192 and MT8195) > - One LVTS node for each HW Domain (AP and MCU) > - One SW Instance for each HW Domain > v7: > - Fix coding style issues > - Rewrite dt bindings > - was not accurate > - Use mt8195 for example (instead of mt8192) > - Rename mt6873 to mt8192 > - Remove clock name > --- > --- > .../thermal/mediatek,lvts-thermal.yaml | 107 ++++++++++++++++++ > include/dt-bindings/thermal/mediatek-lvts.h | 19 ++++ > 2 files changed, 126 insertions(+) > create mode 100644 Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml > create mode 100644 include/dt-bindings/thermal/mediatek-lvts.h > > diff --git a/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml > new file mode 100644 > index 000000000000..12bfbdd8ff89 > --- /dev/null > +++ b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml > @@ -0,0 +1,107 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/thermal/mediatek,lvts-thermal.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: MediaTek SoC Low Voltage Thermal Sensor (LVTS) > + > +maintainers: > + - Balsam CHIHI <bchihi@baylibre.com> > + > +description: | > + LVTS is a thermal management architecture composed of three subsystems, > + a Sensing device - Thermal Sensing Micro Circuit Unit (TSMCU), > + a Converter - Low Voltage Thermal Sensor converter (LVTS), and > + a Digital controller (LVTS_CTRL). > + > +properties: > + compatible: > + enum: > + - mediatek,mt8195-lvts-ap > + - mediatek,mt8195-lvts-mcu > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + resets: > + maxItems: 1 > + description: LVTS reset for clearing temporary data on AP/MCU. > + > + nvmem-cells: > + minItems: 1 > + items: > + - description: Calibration eFuse data 1 for LVTS > + - description: Calibration eFuse data 2 for LVTS > + > + nvmem-cell-names: > + minItems: 1 > + items: > + - const: lvts-calib-data-1 > + - const: lvts-calib-data-2 > + > + "#thermal-sensor-cells": > + const: 1 > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + - resets > + - nvmem-cells > + - nvmem-cell-names > + - "#thermal-sensor-cells" > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/clock/mt8195-clk.h> > + #include <dt-bindings/reset/mt8195-resets.h> > + #include <dt-bindings/thermal/mediatek-lvts.h> > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + > + lvts_mcu: thermal-sensor@11278000 { > + compatible = "mediatek,mt8195-lvts-mcu"; > + reg = <0 0x11278000 0 0x1000>; > + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>; > + clocks = <&infracfg_ao CLK_INFRA_AO_THERM>; > + resets = <&infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST>; > + nvmem-cells = <&lvts_efuse_data1 &lvts_efuse_data2>; > + nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2"; > + #thermal-sensor-cells = <1>; > + }; > + }; > + > + thermal_zones: thermal-zones { > + cpu0-thermal { > + polling-delay = <1000>; > + polling-delay-passive = <250>; > + thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU0>; > + > + trips { > + cpu0_alert: trip-alert { > + temperature = <85000>; > + hysteresis = <2000>; > + type = "passive"; > + }; > + > + cpu0_crit: trip-crit { > + temperature = <100000>; > + hysteresis = <2000>; > + type = "critical"; > + }; > + }; > + }; > + }; > diff --git a/include/dt-bindings/thermal/mediatek-lvts.h b/include/dt-bindings/thermal/mediatek-lvts.h > new file mode 100644 > index 000000000000..902d5b1e4f43 > --- /dev/null > +++ b/include/dt-bindings/thermal/mediatek-lvts.h > @@ -0,0 +1,19 @@ > +/* SPDX-License-Identifier: (GPL-2.0 or MIT) */ > +/* > + * Copyright (c) 2023 MediaTek Inc. > + * Author: Balsam CHIHI <bchihi@baylibre.com> > + */ > + > +#ifndef __MEDIATEK_LVTS_DT_H > +#define __MEDIATEK_LVTS_DT_H > + > +#define MT8195_MCU_BIG_CPU0 0 > +#define MT8195_MCU_BIG_CPU1 1 > +#define MT8195_MCU_BIG_CPU2 2 > +#define MT8195_MCU_BIG_CPU3 3 > +#define MT8195_MCU_LITTLE_CPU0 4 > +#define MT8195_MCU_LITTLE_CPU1 5 > +#define MT8195_MCU_LITTLE_CPU2 6 > +#define MT8195_MCU_LITTLE_CPU3 7 > + > +#endif /* __MEDIATEK_LVTS_DT_H */
On 26/01/2023 17:10, bchihi@baylibre.com wrote: > From: Balsam CHIHI <bchihi@baylibre.com> > > Add LVTS thermal controllers dt-binding definition for mt8195. Subject: drop second/last, redundant "dt-binding definition". The "dt-bindings" prefix is already stating that these are bindings. Plus two comments at the end. > > Signed-off-by: Balsam CHIHI <bchihi@baylibre.com> > --- > Changelog: > v12: > - Fixed subject prefix > - Fixed licences GPL-2.0+ to GPL-2.0 > - Added dual licenses > + }; > diff --git a/include/dt-bindings/thermal/mediatek-lvts.h b/include/dt-bindings/thermal/mediatek-lvts.h > new file mode 100644 > index 000000000000..902d5b1e4f43 > --- /dev/null > +++ b/include/dt-bindings/thermal/mediatek-lvts.h Same filename as bindings. > @@ -0,0 +1,19 @@ > +/* SPDX-License-Identifier: (GPL-2.0 or MIT) */ Although this is correct, any reason why not using exactly the same license as bindings? > +/* > + * Copyright (c) 2023 MediaTek Inc. > + * Author: Balsam CHIHI <bchihi@baylibre.com> > + */ Best regards, Krzysztof
On 27/01/2023 23:10, Daniel Lezcano wrote: > > Hi Rob, > > I think Balsam took into account your comments. Is it fine for you ? > The patchset was not sent to us at all, so it is the second version we see. Therefore it's not v12 for us. It's v2 and it still needs fixes. I replied with minor comments (which could be fixed during applying) and the license concern (which you rather cannot change while applying). Best regards, Krzysztof
Hi Krzysztof, On Sat, Jan 28, 2023 at 11:50 AM Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > On 27/01/2023 23:10, Daniel Lezcano wrote: > > > > Hi Rob, > > > > I think Balsam took into account your comments. Is it fine for you ? > > > > The patchset was not sent to us at all, so it is the second version we > see. Therefore it's not v12 for us. It's v2 and it still needs fixes. > > I replied with minor comments (which could be fixed during applying) and > the license concern (which you rather cannot change while applying). I apologize for forgetting to add some email addresses while sending previous versions. The changes you asked in your preview comment are taken in account and ready to be sent. Please let me know what version number should the patch have. > > Best regards, > Krzysztof > Best regards, Balsam
Hi Matthias, On Mon, Jan 30, 2023 at 12:18 PM Matthias Brugger <matthias.bgg@gmail.com> wrote: > > > > On 30/01/2023 11:40, Balsam CHIHI wrote: > > Hi Krzysztof, > > > > Thank you for the feedback. > > > > On Sat, Jan 28, 2023 at 11:48 AM Krzysztof Kozlowski > > <krzysztof.kozlowski@linaro.org> wrote: > >> > >> On 26/01/2023 17:10, bchihi@baylibre.com wrote: > >>> From: Balsam CHIHI <bchihi@baylibre.com> > >>> > >>> Add LVTS thermal controllers dt-binding definition for mt8195. > >> > >> Subject: drop second/last, redundant "dt-binding definition". The > >> "dt-bindings" prefix is already stating that these are bindings. > > > > fixed. > > The patch title has been fixed as you suggested : > > "dt-bindings: thermal: mediatek: Add LVTS thermal controllers" > > > >> > >> Plus two comments at the end. > >> > >>> > >>> Signed-off-by: Balsam CHIHI <bchihi@baylibre.com> > >>> --- > >>> Changelog: > >>> v12: > >>> - Fixed subject prefix > >>> - Fixed licences GPL-2.0+ to GPL-2.0 > >>> - Added dual licenses > >> > >> > >>> + }; > >>> diff --git a/include/dt-bindings/thermal/mediatek-lvts.h b/include/dt-bindings/thermal/mediatek-lvts.h > >>> new file mode 100644 > >>> index 000000000000..902d5b1e4f43 > >>> --- /dev/null > >>> +++ b/include/dt-bindings/thermal/mediatek-lvts.h > >> > >> Same filename as bindings. > > > > fixed. > > rename : > > include/dt-bindings/thermal/mediatek-lvts.h => > > include/dt-bindings/thermal/mediatek-lvts-thermal.h > > > > I think it should be > include/dt-bindings/thermal/mediatek,lvts-thermal.yaml OK, I will change it like that. (".h" and not ".yaml" I believe (just to be sure).). > > Regards, > Matthias > > >> > >>> @@ -0,0 +1,19 @@ > >>> +/* SPDX-License-Identifier: (GPL-2.0 or MIT) */ > >> > >> Although this is correct, any reason why not using exactly the same > >> license as bindings? > > > > fixed. > > both files are now using the same license : > > "SPDX-License-Identifier: (GPL-2.0 or MIT)" > > > >> > >>> +/* > >>> + * Copyright (c) 2023 MediaTek Inc. > >>> + * Author: Balsam CHIHI <bchihi@baylibre.com> > >>> + */ > >> > >> Best regards, > >> Krzysztof > >> > > > > I'll send the changes soon. > > > > Best regards, > > Balsam Best regards, Balsam
On 30/01/2023 11:40, Balsam CHIHI wrote: >>> diff --git a/include/dt-bindings/thermal/mediatek-lvts.h b/include/dt-bindings/thermal/mediatek-lvts.h >>> new file mode 100644 >>> index 000000000000..902d5b1e4f43 >>> --- /dev/null >>> +++ b/include/dt-bindings/thermal/mediatek-lvts.h >> >> Same filename as bindings. > > fixed. > rename : > include/dt-bindings/thermal/mediatek-lvts.h => > include/dt-bindings/thermal/mediatek-lvts-thermal.h Missing coma, so mediatek,lvts-thermal.h Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml new file mode 100644 index 000000000000..12bfbdd8ff89 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml @@ -0,0 +1,107 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/mediatek,lvts-thermal.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek SoC Low Voltage Thermal Sensor (LVTS) + +maintainers: + - Balsam CHIHI <bchihi@baylibre.com> + +description: | + LVTS is a thermal management architecture composed of three subsystems, + a Sensing device - Thermal Sensing Micro Circuit Unit (TSMCU), + a Converter - Low Voltage Thermal Sensor converter (LVTS), and + a Digital controller (LVTS_CTRL). + +properties: + compatible: + enum: + - mediatek,mt8195-lvts-ap + - mediatek,mt8195-lvts-mcu + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + description: LVTS reset for clearing temporary data on AP/MCU. + + nvmem-cells: + minItems: 1 + items: + - description: Calibration eFuse data 1 for LVTS + - description: Calibration eFuse data 2 for LVTS + + nvmem-cell-names: + minItems: 1 + items: + - const: lvts-calib-data-1 + - const: lvts-calib-data-2 + + "#thermal-sensor-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - resets + - nvmem-cells + - nvmem-cell-names + - "#thermal-sensor-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/mt8195-clk.h> + #include <dt-bindings/reset/mt8195-resets.h> + #include <dt-bindings/thermal/mediatek-lvts.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + lvts_mcu: thermal-sensor@11278000 { + compatible = "mediatek,mt8195-lvts-mcu"; + reg = <0 0x11278000 0 0x1000>; + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&infracfg_ao CLK_INFRA_AO_THERM>; + resets = <&infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST>; + nvmem-cells = <&lvts_efuse_data1 &lvts_efuse_data2>; + nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2"; + #thermal-sensor-cells = <1>; + }; + }; + + thermal_zones: thermal-zones { + cpu0-thermal { + polling-delay = <1000>; + polling-delay-passive = <250>; + thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU0>; + + trips { + cpu0_alert: trip-alert { + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu0_crit: trip-crit { + temperature = <100000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; diff --git a/include/dt-bindings/thermal/mediatek-lvts.h b/include/dt-bindings/thermal/mediatek-lvts.h new file mode 100644 index 000000000000..428a95c18509 --- /dev/null +++ b/include/dt-bindings/thermal/mediatek-lvts.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2023 MediaTek Inc. + * Author: Balsam CHIHI <bchihi@baylibre.com> + */ + +#ifndef __MEDIATEK_LVTS_DT_H +#define __MEDIATEK_LVTS_DT_H + +#define MT8195_MCU_BIG_CPU0 0 +#define MT8195_MCU_BIG_CPU1 1 +#define MT8195_MCU_BIG_CPU2 2 +#define MT8195_MCU_BIG_CPU3 3 +#define MT8195_MCU_LITTLE_CPU0 4 +#define MT8195_MCU_LITTLE_CPU1 5 +#define MT8195_MCU_LITTLE_CPU2 6 +#define MT8195_MCU_LITTLE_CPU3 7 + +#endif /* __MEDIATEK_LVTS_DT_H */