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client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CH1PEPF0000A348.mail.protection.outlook.com (10.167.244.4) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8230.7 via Frontend Transport; Mon, 9 Dec 2024 18:53:16 +0000 Received: from AUS-P9-MLIMONCI.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Mon, 9 Dec 2024 12:53:15 -0600 From: Mario Limonciello To: "Gautham R . Shenoy" CC: Perry Yuan , , , Dhananjay Ugwekar , Mario Limonciello , "Artem S . Tashkinov" , Dhananjay Ugwekar Subject: [PATCH v3 14/15] cpufreq/amd-pstate: Set different default EPP policy for Epyc and Ryzen Date: Mon, 9 Dec 2024 12:52:47 -0600 Message-ID: <20241209185248.16301-15-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241209185248.16301-1-mario.limonciello@amd.com> References: <20241209185248.16301-1-mario.limonciello@amd.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000A348:EE_|SA1PR12MB7319:EE_ X-MS-Office365-Filtering-Correlation-Id: db0cc331-1415-4167-4b3d-08dd1882bdef X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|376014|82310400026|1800799024|36860700013; X-Microsoft-Antispam-Message-Info: pTJ2nVNIek+AAJwQG75SKVAPYR8XzADQ6+jskPm9exw5LW3npzng0D6W9TDNFNIST2g8JQtjHpNOKSP86Okx4H5zIbbyjEUoMcE1QgQcUdAyTn8qjypfL+GSxY28YB6jzjfZw+ES8S0ZTW3CiOBWtXDdiPAsKNphroScNdQAiHfKdFZFtGeqwwnU/sCL92btxZx3BPmSvJPH3vtCXPqw7GUveLJ7SMsPBb40gnfDA6FBExhXA60QEgS4w0jSh2ym8gZRX9dNj/xCdT+RtIdVtiQvL09/WlKntcIxFrXwCC5yUy0pKHX0Ozhyl/qumXejfIh86IM2RYMlVH6siwY7m6hpOM7KKGGRLDorkTINGvarropPVZXS02DsawbNzMMwfv451wxqlY1v8jkIVsQTBPLk9vzfSV5jssIn1duBzy7wHcMpN7LOCo9NPSIXB9qwW2TZrWvCNEVCrXTSRYyM9afnUzT0lSEP8/9CCrTzolwphIPPWmuh/K0H+EJVbv8JD/C2sjof9B7XVnt6/wotY0jq/1SKXTQfSRWC422djIhsvw5TruEObDqlKvFJ3IyHJ5H9Jrd7LN3RJDyanmBxA8q8yC4FS+O+JZNw6IeTR24RpDgM1SZQBbk8BzaZKSeLqyj/v1H73iw8pf3cz01dEnCm/Y4Lfw5yCPIPVMG/rsNRumoXkx/zQIr6ZnUb5aGCTHSxWMAD8FdIaILwNGbmRpckZAqEXCHh0zpzg0Tu1wj3JC/ku6VaLHx1Lgt85fwBjXaoP2P/kTe1g/e1d1fLfqINdqArjP93SjulPSuqpFEFk5RuPVBIFB7Y52tJARz0fKIShkkv1Kwiuak7HgmeCmmRCq8Usjc9Pqg8krNg1nYCvGwRCrr2RudPA0rxRcAkKE9tqfWVEr/7wsk9GG9rWQNMBcimGtSXGKjNC/Hh5JCj8xu6srywUQcmKFV2+sohbRovCdfwRK/TY5Tdz1aEdM4zdfwG76A2tl3wZp3YnD4EOmNpyvTKHu2DnlJ3ZmGKgNOTV+GLNZQsjWDvaTJ1QVwx+oIg8NEeSfa1yyiMJ4PVMBzivEOmzYe1GOUjtAczrV0CFNhVpuPrlKNtuJtkR+MzMVKbNw7YcWfspJ5JeEVPb40k1PtC34wV2F48c5f6xy+bMeoGFIMwm3moy9mLgrqOjom+gDNcE2fLNGpSUhcZ6zow3f7FyrIdOaHdoOi0yGWJ76/u+6OXOvAuQ14CsEBCYf3WWxttFE7R7tcjDCHjjJPHbhZ40vV0Ox5XJKPFwePXPf8WKdcEX6Czad9ztOu/wb9m93xDU2UEoZDWg9tZHZrVIZiDnFOtr196dyCPTZXFNZFT/qxHYJ9s6Cei0u2E9yPDJVRdsH9sIUL+NKnT9jQAlWuVTorToUZaNU2BpH6HLUmQIG7e6mvIQpeXjlEdH1QXLEH+K8DxeQ+a5RGxkAWQO0lx4zE3IH1FxEFI X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(376014)(82310400026)(1800799024)(36860700013); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Dec 2024 18:53:16.6932 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: db0cc331-1415-4167-4b3d-08dd1882bdef X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000A348.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB7319 For Ryzen systems the EPP policy set by the BIOS is generally configured to performance as this is the default register value for the CPPC request MSR. If a user doesn't use additional software to configure EPP then the system will default biased towards performance and consume extra battery. Instead configure the default to "balanced_performance" for this case. Suggested-by: Artem S. Tashkinov Reviewed-by: Dhananjay Ugwekar Tested-by: Dhananjay Ugwekar Closes: https://bugzilla.kernel.org/show_bug.cgi?id=219526 Reviewed-by: Gautham R. Shenoy Signed-off-by: Mario Limonciello --- drivers/cpufreq/amd-pstate.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index ead3a47570139..308d30a25f100 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -1501,8 +1501,6 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy) policy->driver_data = cpudata; - cpudata->epp_cached = cpudata->epp_default = amd_pstate_get_epp(cpudata); - policy->min = policy->cpuinfo.min_freq; policy->max = policy->cpuinfo.max_freq; @@ -1513,10 +1511,13 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy) * the default cpufreq governor is neither powersave nor performance. */ if (amd_pstate_acpi_pm_profile_server() || - amd_pstate_acpi_pm_profile_undefined()) + amd_pstate_acpi_pm_profile_undefined()) { policy->policy = CPUFREQ_POLICY_PERFORMANCE; - else + cpudata->epp_default = amd_pstate_get_epp(cpudata); + } else { policy->policy = CPUFREQ_POLICY_POWERSAVE; + cpudata->epp_default = AMD_CPPC_EPP_BALANCE_PERFORMANCE; + } if (cpu_feature_enabled(X86_FEATURE_CPPC)) { ret = rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, &value); @@ -1529,6 +1530,9 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy) return ret; WRITE_ONCE(cpudata->cppc_cap1_cached, value); } + ret = amd_pstate_set_epp(cpudata, cpudata->epp_default); + if (ret) + return ret; current_pstate_driver->adjust_perf = NULL;