From patchwork Fri Dec 20 21:37:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sohil Mehta X-Patchwork-Id: 852695 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.14]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 23E62228380; Fri, 20 Dec 2024 21:39:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.14 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734730761; cv=none; b=Fif3sh1W3K1NzNeJRfZV5SFnblzXl0h8kI6oid1R5EryAhWnX1eZScxwYNpCSsaF7kHCooVpGwar6bd1+Gv50etixaINg5Qs9EKCf3ajfr6xbhqTGIDMOp+aZlYnAHRzbQVi9qqugC4mGog+Xm9daaSUMqnmCKlmFx04kINu8/k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734730761; c=relaxed/simple; bh=w5yxFrFjNk2rOvxvNr3CKSLfp4P0JFH0fW/f7AsjuWk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=cBlw2vDz7iGgyzB+OIoJ27/az5Ul+Oj/AiPZzhvusLCXFBGscqlhVa9c1kGHGrX+iD/FZE6a7ODqHr50gFsb9F0J+Rk3fMRlhX27lRQwNUVH8CjYoIUu15m4AgouTnHJ4h0CqAr3afeSFjMAqpk14Vla014PnN6wgVeIkgxWquk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=OQr9/+Qv; arc=none smtp.client-ip=198.175.65.14 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="OQr9/+Qv" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1734730760; x=1766266760; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=w5yxFrFjNk2rOvxvNr3CKSLfp4P0JFH0fW/f7AsjuWk=; b=OQr9/+Qvgw3JDdIS2lmdkQyNX0EaOz7Ua3Qo15KXMLhPK9lhDkXjeJeF JQ7AmvAV3wyGtB894wQtvCX1EJlrtJVBS9Rk23+y3242Wz7bKPtUzOYAX CvUfDVt6oRO7LE33jgwOpLCtIAkI3z6QU1hvyPns00jEJduVtJBkwS6s8 QdSRc6/KtKHerUOiKp3jd+KMmPpGpc5VR+7y5E4JnsXpNA5mtXebCV5Tc RIgZG4Oim2t4Lx0DNP0WXxiz9eDFl4iD4NSZQ3SVbHudlWWyyamuBs/li Rp9VEYQABYZSzR1UmhnC/Lg6ollRQTuBQQXa7GsW6OPAhTdeXJ2uOGQCO A==; X-CSE-ConnectionGUID: qIoCiHMbRZOPfqGS8BTPaw== X-CSE-MsgGUID: B3Z3aUNkQOOaK2sfAhE44w== X-IronPort-AV: E=McAfee;i="6700,10204,11292"; a="39070699" X-IronPort-AV: E=Sophos;i="6.12,251,1728975600"; d="scan'208";a="39070699" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Dec 2024 13:39:17 -0800 X-CSE-ConnectionGUID: +7AvRxIXRzK5RubY0g8fEQ== X-CSE-MsgGUID: 5/NJpDxeTAWD4dS0s729CA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="103223847" Received: from sohilmeh.sc.intel.com ([172.25.103.65]) by fmviesa005.fm.intel.com with ESMTP; 20 Dec 2024 13:39:16 -0800 From: Sohil Mehta To: x86@kernel.org, Dave Hansen , Tony Luck Cc: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , Kan Liang , Thomas Gleixner , Borislav Petkov , "H . Peter Anvin" , "Rafael J . Wysocki" , Len Brown , Andy Lutomirski , Viresh Kumar , Fenghua Yu , Jean Delvare , Guenter Roeck , Sohil Mehta , Zhang Rui , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, linux-pm@vger.kernel.org, linux-hwmon@vger.kernel.org Subject: [RFC PATCH 07/15] x86/mtrr: Modify a x86_model check to an Intel VFM check Date: Fri, 20 Dec 2024 21:37:02 +0000 Message-ID: <20241220213711.1892696-8-sohil.mehta@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241220213711.1892696-1-sohil.mehta@intel.com> References: <20241220213711.1892696-1-sohil.mehta@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Get rid of one of the last few Intel x86_model checks in arch/x86. Signed-off-by: Sohil Mehta --- arch/x86/kernel/cpu/mtrr/generic.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c index 7b29ebda024f..36f5dbd2f482 100644 --- a/arch/x86/kernel/cpu/mtrr/generic.c +++ b/arch/x86/kernel/cpu/mtrr/generic.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -1025,8 +1026,7 @@ int generic_validate_add_page(unsigned long base, unsigned long size, * For Intel PPro stepping <= 7 * must be 4 MiB aligned and not touch 0x70000000 -> 0x7003FFFF */ - if (mtrr_if == &generic_mtrr_ops && boot_cpu_data.x86 == 6 && - boot_cpu_data.x86_model == 1 && + if (mtrr_if == &generic_mtrr_ops && boot_cpu_data.x86_vfm == INTEL_PENTIUM_PRO && boot_cpu_data.x86_stepping <= 7) { if (base & ((1 << (22 - PAGE_SHIFT)) - 1)) { pr_warn("mtrr: base(0x%lx000) is not 4 MiB aligned\n", base);