From patchwork Wed May 1 13:58:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 163217 Delivered-To: patch@linaro.org Received: by 2002:a92:7e86:0:0:0:0:0 with SMTP id q6csp4554624ill; Wed, 1 May 2019 06:58:50 -0700 (PDT) X-Google-Smtp-Source: APXvYqwhnoxM7reN152uLGDQ79kEKvfEVXiToNfhNivC4M/wARgAqyXJJCA3V9Lsl4YZL3XLbuSa X-Received: by 2002:a63:1364:: with SMTP id 36mr69304877pgt.436.1556719130115; Wed, 01 May 2019 06:58:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1556719130; cv=none; d=google.com; s=arc-20160816; b=HEZjnD/3Pca+O06Wv5atcZxAkhuPAT/lKTnnKsYPG0mfCOCfrIBEBG4h0nKvpuYrbw bDFY+BpDAzifHy5U9PNepY2oUMGPU55f5NzKNMivyGeaFo20CQvPbL0ncIpFBuLex0Ly hcQmPFG9LFi1YVQn8/JCwiGnRqwX7ALSNYYeETf7HVpNjxUZtl/VwDVdsFCLxDzijLnA JuVXh/cIpxtSazennb/sn00QXj64YKQqYe57O2/2f9B9drtKXuUI8YUC4uUjsaltpVMC C8nUk1pNxmGLMdC0cwrVpaE5R2ShyGs3w4/CjU6P5V+J0hw0kukgUt4IjJRde858+VHF q/iQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=RU4jYb2LkP1iZCl2kNJOlY2s5PdmDNjuTVAIdbIDl+0=; b=qjyuxDhGWNcj+vhlYdXTG3q8fRFvFkR1VJb1ZNvVFbcqnbJF+hdFhyZiLrcgw4RLJ+ 2j/Ozs5lfaXA8ZTzFQdGZa5fyWh/QTiWZ58b6wODTNJt7GMU7OPKBQcG8hJWIGBGZpts rxrLBMZSXtVrR8ZixRtlk3CzSCMu7it4iPzpVN4Gxs7hLW0ZOooA75Cv8nC9dEVIlMuN OeYbFpwEGyGJDzGXbNhJlKkoX26v0Xb7BdVvII8DKxnqAGNSOcJ2nE3tegH1NmAGvrAz vLDBIkFKQ6HaepIvU9gkFkO9zSrqXuOJDmofkKtD/Er6WjkHoL4qiO+9FXxF8kBovsgl qDBg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-rt-users-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-rt-users-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z1si24371351pgb.581.2019.05.01.06.58.49; Wed, 01 May 2019 06:58:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-rt-users-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-rt-users-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-rt-users-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726666AbfEAN6s (ORCPT + 3 others); Wed, 1 May 2019 09:58:48 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:59694 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726657AbfEAN6r (ORCPT ); Wed, 1 May 2019 09:58:47 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 87553EBD; Wed, 1 May 2019 06:58:46 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 13B883F5AF; Wed, 1 May 2019 06:58:43 -0700 (PDT) From: Julien Grall To: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Cc: logang@deltatee.com, douliyangs@gmail.com, miquel.raynal@bootlin.com, marc.zyngier@arm.com, jason@lakedaemon.net, tglx@linutronix.de, joro@8bytes.org, robin.murphy@arm.com, bigeasy@linutronix.de, linux-rt-users@vger.kernel.org, Julien Grall , Eric Auger Subject: [PATCH v3 4/7] irqchip/gic-v3-its: Don't map the MSI page in its_irq_compose_msi_msg() Date: Wed, 1 May 2019 14:58:21 +0100 Message-Id: <20190501135824.25586-5-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190501135824.25586-1-julien.grall@arm.com> References: <20190501135824.25586-1-julien.grall@arm.com> Sender: linux-rt-users-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rt-users@vger.kernel.org its_irq_compose_msi_msg() may be called from non-preemptible context. However, on RT, iommu_dma_map_msi_msg requires to be called from a preemptible context. A recent change split iommu_dma_map_msi_msg() in two new functions: one that should be called in preemptible context, the other does not have any requirement. The GICv3 ITS driver is reworked to avoid executing preemptible code in non-preemptible context. This can be achieved by preparing the MSI mapping when allocating the MSI interrupt. Signed-off-by: Julien Grall Reviewed-by: Eric Auger --- Changes in v3: - Fix typo in the commit message - Check the return of iommu_dma_prepare_msi - Add Eric's reviewed-by Changes in v2: - Rework the commit message to use imperative mood --- drivers/irqchip/irq-gic-v3-its.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) -- 2.11.0 diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index 7577755bdcf4..9cddf336c09d 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -1179,7 +1179,7 @@ static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) msg->address_hi = upper_32_bits(addr); msg->data = its_get_event_id(d); - iommu_dma_map_msi_msg(d->irq, msg); + iommu_dma_compose_msi_msg(irq_data_get_msi_desc(d), msg); } static int its_irq_set_irqchip_state(struct irq_data *d, @@ -2566,6 +2566,7 @@ static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, { msi_alloc_info_t *info = args; struct its_device *its_dev = info->scratchpad[0].ptr; + struct its_node *its = its_dev->its; irq_hw_number_t hwirq; int err; int i; @@ -2574,6 +2575,10 @@ static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, if (err) return err; + err = iommu_dma_prepare_msi(info->desc, its->get_msi_base(its_dev)); + if (err) + return err; + for (i = 0; i < nr_irqs; i++) { err = its_irq_gic_domain_alloc(domain, virq + i, hwirq + i); if (err)