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[v2,00/16] PCI: dwc: Another round of clean-ups

Message ID 20201105211159.1814485-1-robh@kernel.org
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Series PCI: dwc: Another round of clean-ups | expand

Message

Rob Herring Nov. 5, 2020, 9:11 p.m. UTC
Here's another batch of DWC PCI host refactoring. This series primarily
moves more of the MSI, link up, and resource handling to the core
code. Beyond a couple of minor fixes, new in this version is runtime
detection of iATU regions instead of using DT properties.

No doubt I've probably broken something. Please test. I've run this thru
kernelci and checked boards with DWC PCI which currently is just
Layerscape boards (hint: add boards and/or enable PCI). A git branch is
here[1].

This is dependent on "PCI: dwc: Restore ATU memory resource setup to use
last entry" which will be in v5.10-rc3.

Rob

[1] git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git pci-more-dwc-cleanup

Rob Herring (16):
  PCI: dwc: Support multiple ATU memory regions
  PCI: dwc/intel-gw: Move ATU offset out of driver match data
  PCI: dwc: Move "dbi", "dbi2", and "addr_space" resource setup into
    common code
  PCI: dwc/intel-gw: Remove some unneeded function wrappers
  PCI: dwc: Ensure all outbound ATU windows are reset
  PCI: dwc/dra7xx: Use the common MSI irq_chip
  PCI: dwc: Drop the .set_num_vectors() host op
  PCI: dwc: Move MSI interrupt setup into DWC common code
  PCI: dwc: Rework MSI initialization
  PCI: dwc: Move link handling into common code
  PCI: dwc: Move dw_pcie_msi_init() into core
  PCI: dwc: Move dw_pcie_setup_rc() to DWC common code
  PCI: dwc: Remove unnecessary wrappers around dw_pcie_host_init()
  Revert "PCI: dwc/keystone: Drop duplicated 'num-viewport'"
  PCI: dwc: Move inbound and outbound windows to common struct
  PCI: dwc: Detect number of iATU windows

 drivers/pci/controller/dwc/pci-dra7xx.c       | 141 +-----------------
 drivers/pci/controller/dwc/pci-exynos.c       |  50 ++-----
 drivers/pci/controller/dwc/pci-imx6.c         |  39 +----
 drivers/pci/controller/dwc/pci-keystone.c     |  79 ++--------
 .../pci/controller/dwc/pci-layerscape-ep.c    |  37 +----
 drivers/pci/controller/dwc/pci-layerscape.c   |  67 +--------
 drivers/pci/controller/dwc/pci-meson.c        |  53 ++-----
 drivers/pci/controller/dwc/pcie-al.c          |  29 +---
 drivers/pci/controller/dwc/pcie-armada8k.c    |  37 ++---
 drivers/pci/controller/dwc/pcie-artpec6.c     |  76 +---------
 .../pci/controller/dwc/pcie-designware-ep.c   |  58 +++----
 .../pci/controller/dwc/pcie-designware-host.c | 139 ++++++++++-------
 .../pci/controller/dwc/pcie-designware-plat.c |  70 +--------
 drivers/pci/controller/dwc/pcie-designware.c  |  93 +++++++++++-
 drivers/pci/controller/dwc/pcie-designware.h  |  24 +--
 drivers/pci/controller/dwc/pcie-histb.c       |  37 ++---
 drivers/pci/controller/dwc/pcie-intel-gw.c    |  67 ++-------
 drivers/pci/controller/dwc/pcie-kirin.c       |  62 +-------
 drivers/pci/controller/dwc/pcie-qcom.c        |  38 +----
 drivers/pci/controller/dwc/pcie-spear13xx.c   |  62 +++-----
 drivers/pci/controller/dwc/pcie-tegra194.c    |  41 +----
 drivers/pci/controller/dwc/pcie-uniphier-ep.c |  38 +----
 drivers/pci/controller/dwc/pcie-uniphier.c    |  51 +------
 23 files changed, 356 insertions(+), 1032 deletions(-)

--
2.25.1

Comments

Marek Szyprowski Nov. 6, 2020, 9:17 a.m. UTC | #1
Hi Rob,

On 05.11.2020 22:11, Rob Herring wrote:
> Here's another batch of DWC PCI host refactoring. This series primarily

> moves more of the MSI, link up, and resource handling to the core

> code. Beyond a couple of minor fixes, new in this version is runtime

> detection of iATU regions instead of using DT properties.


iATU detection seems to work fine with 
https://lore.kernel.org/linux-samsung-soc/20201029134017.27400-1-m.szyprowski@samsung.com/ 
on top of your patchset on Samsung Exynos5433 SoC:

exynos-pcie 15700000.pcie: host bridge /soc@0/pcie@15700000 ranges:
exynos-pcie 15700000.pcie:       IO 0x000c001000..0x000c010fff -> 
0x0000000000
exynos-pcie 15700000.pcie:      MEM 0x000c011000..0x000ffffffe -> 
0x000c011000
exynos-pcie 15700000.pcie: iATU unroll: disabled
exynos-pcie 15700000.pcie: Detected iATU regions: 3 outbound, 5 inbound
exynos-pcie 15700000.pcie: Link up
exynos-pcie 15700000.pcie: PCI host bridge to bus 0000:00

Fell free to add my:

Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>


> No doubt I've probably broken something. Please test. I've run this thru

> kernelci and checked boards with DWC PCI which currently is just

> Layerscape boards (hint: add boards and/or enable PCI). A git branch is

> here[1].

>

> This is dependent on "PCI: dwc: Restore ATU memory resource setup to use

> last entry" which will be in v5.10-rc3.

>

> Rob

>

> [1] git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git pci-more-dwc-cleanup

>

> Rob Herring (16):

>    PCI: dwc: Support multiple ATU memory regions

>    PCI: dwc/intel-gw: Move ATU offset out of driver match data

>    PCI: dwc: Move "dbi", "dbi2", and "addr_space" resource setup into

>      common code

>    PCI: dwc/intel-gw: Remove some unneeded function wrappers

>    PCI: dwc: Ensure all outbound ATU windows are reset

>    PCI: dwc/dra7xx: Use the common MSI irq_chip

>    PCI: dwc: Drop the .set_num_vectors() host op

>    PCI: dwc: Move MSI interrupt setup into DWC common code

>    PCI: dwc: Rework MSI initialization

>    PCI: dwc: Move link handling into common code

>    PCI: dwc: Move dw_pcie_msi_init() into core

>    PCI: dwc: Move dw_pcie_setup_rc() to DWC common code

>    PCI: dwc: Remove unnecessary wrappers around dw_pcie_host_init()

>    Revert "PCI: dwc/keystone: Drop duplicated 'num-viewport'"

>    PCI: dwc: Move inbound and outbound windows to common struct

>    PCI: dwc: Detect number of iATU windows

>

>   drivers/pci/controller/dwc/pci-dra7xx.c       | 141 +-----------------

>   drivers/pci/controller/dwc/pci-exynos.c       |  50 ++-----

>   drivers/pci/controller/dwc/pci-imx6.c         |  39 +----

>   drivers/pci/controller/dwc/pci-keystone.c     |  79 ++--------

>   .../pci/controller/dwc/pci-layerscape-ep.c    |  37 +----

>   drivers/pci/controller/dwc/pci-layerscape.c   |  67 +--------

>   drivers/pci/controller/dwc/pci-meson.c        |  53 ++-----

>   drivers/pci/controller/dwc/pcie-al.c          |  29 +---

>   drivers/pci/controller/dwc/pcie-armada8k.c    |  37 ++---

>   drivers/pci/controller/dwc/pcie-artpec6.c     |  76 +---------

>   .../pci/controller/dwc/pcie-designware-ep.c   |  58 +++----

>   .../pci/controller/dwc/pcie-designware-host.c | 139 ++++++++++-------

>   .../pci/controller/dwc/pcie-designware-plat.c |  70 +--------

>   drivers/pci/controller/dwc/pcie-designware.c  |  93 +++++++++++-

>   drivers/pci/controller/dwc/pcie-designware.h  |  24 +--

>   drivers/pci/controller/dwc/pcie-histb.c       |  37 ++---

>   drivers/pci/controller/dwc/pcie-intel-gw.c    |  67 ++-------

>   drivers/pci/controller/dwc/pcie-kirin.c       |  62 +-------

>   drivers/pci/controller/dwc/pcie-qcom.c        |  38 +----

>   drivers/pci/controller/dwc/pcie-spear13xx.c   |  62 +++-----

>   drivers/pci/controller/dwc/pcie-tegra194.c    |  41 +----

>   drivers/pci/controller/dwc/pcie-uniphier-ep.c |  38 +----

>   drivers/pci/controller/dwc/pcie-uniphier.c    |  51 +------

>   23 files changed, 356 insertions(+), 1032 deletions(-)

>

> --

> 2.25.1

>

Best regards
-- 
Marek Szyprowski, PhD
Samsung R&D Institute Poland
Lorenzo Pieralisi Nov. 19, 2020, 11:01 a.m. UTC | #2
On Thu, 5 Nov 2020 15:11:43 -0600, Rob Herring wrote:
> Here's another batch of DWC PCI host refactoring. This series primarily

> moves more of the MSI, link up, and resource handling to the core

> code. Beyond a couple of minor fixes, new in this version is runtime

> detection of iATU regions instead of using DT properties.

> 

> No doubt I've probably broken something. Please test. I've run this thru

> kernelci and checked boards with DWC PCI which currently is just

> Layerscape boards (hint: add boards and/or enable PCI). A git branch is

> here[1].

> 

> [...]


Applied to pci/dwc, thanks!

[01/16] PCI: dwc: Support multiple ATU memory regions
        https://git.kernel.org/lpieralisi/pci/c/9f9e59a480
[02/16] PCI: dwc/intel-gw: Move ATU offset out of driver match data
        https://git.kernel.org/lpieralisi/pci/c/1d567aac46
[03/16] PCI: dwc: Move "dbi", "dbi2", and "addr_space" resource setup into common code
        https://git.kernel.org/lpieralisi/pci/c/a0fd361db8
[04/16] PCI: dwc/intel-gw: Remove some unneeded function wrappers
        https://git.kernel.org/lpieralisi/pci/c/1cc9a55999
[05/16] PCI: dwc: Ensure all outbound ATU windows are reset
        https://git.kernel.org/lpieralisi/pci/c/458ad06c4c
[06/16] PCI: dwc/dra7xx: Use the common MSI irq_chip
        https://git.kernel.org/lpieralisi/pci/c/7f170d35f5
[07/16] PCI: dwc: Drop the .set_num_vectors() host op
        https://git.kernel.org/lpieralisi/pci/c/331e9bcead
[08/16] PCI: dwc: Move MSI interrupt setup into DWC common code
        https://git.kernel.org/lpieralisi/pci/c/5bcb1757e6
[09/16] PCI: dwc: Rework MSI initialization
        https://git.kernel.org/lpieralisi/pci/c/f78f02638a
[10/16] PCI: dwc: Move link handling into common code
        https://git.kernel.org/lpieralisi/pci/c/886a9c1347
[11/16] PCI: dwc: Move dw_pcie_msi_init() into core
        https://git.kernel.org/lpieralisi/pci/c/59fbab1ae4
[12/16] PCI: dwc: Move dw_pcie_setup_rc() to DWC common code
        https://git.kernel.org/lpieralisi/pci/c/b9ac0f9dc8
[13/16] PCI: dwc: Remove unnecessary wrappers around dw_pcie_host_init()
        https://git.kernel.org/lpieralisi/pci/c/60f5b73fa0
[14/16] Revert "PCI: dwc/keystone: Drop duplicated 'num-viewport'"
        https://git.kernel.org/lpieralisi/pci/c/fcde397422
[15/16] PCI: dwc: Move inbound and outbound windows to common struct
        https://git.kernel.org/lpieralisi/pci/c/9ca17af552
[16/16] PCI: dwc: Detect number of iATU windows
        https://git.kernel.org/lpieralisi/pci/c/281f1f99cf

Thanks,
Lorenzo