From patchwork Sat Mar 24 09:33:02 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: thomas.abraham@linaro.org X-Patchwork-Id: 7440 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 8AB6723E0C for ; Sat, 24 Mar 2012 09:28:30 +0000 (UTC) Received: from mail-iy0-f180.google.com (mail-iy0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id 390C9A18601 for ; Sat, 24 Mar 2012 09:28:30 +0000 (UTC) Received: by iage36 with SMTP id e36so7719158iag.11 for ; Sat, 24 Mar 2012 02:28:29 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:x-auditid :from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-brightmail-tracker:x-tm-as-mml:x-gm-message-state; bh=rR/aLZ/W/jHdI8vOhoBcB5miXVv3+Bc6q9BNcOekxj0=; b=m5cJmURbWSw07o1Co3+0Ad+Fi4lD/8OM44oSCWJO9pzXLrjcHq2vrJCM5USm898uM5 7NZ3oM2jz9ECp3JCiQJJR7aoW/t9R2Mdl8NOTofZ/d/2OLUyipXsw63uZzkmKDBkhQxa ZtL6WDkIa7Pb0qjQ0TNOvXVU9iqNSHv45UA1ewki04U0WYKx5cnCEBMD8732i6vJZu8B lPfPyzuC7SsSITINQFxN3loYLMXYAz8OHdcoj/A/C6t394cT/LLwb4ySzW+GfWvliT/l 9EoHanOX9lJNUotaqGS78kzJYTrxGyoimByfg7UHJnTU4RLz4J+wLhcGX+/3qvNKEDAD QNYQ== Received: by 10.50.183.163 with SMTP id en3mr1109478igc.12.1332581309693; Sat, 24 Mar 2012 02:28:29 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.203.79 with SMTP id fh15csp43422ibb; Sat, 24 Mar 2012 02:28:29 -0700 (PDT) Received: by 10.68.219.5 with SMTP id pk5mr36230225pbc.12.1332581308269; Sat, 24 Mar 2012 02:28:28 -0700 (PDT) Received: from mailout2.samsung.com (mailout2.samsung.com. [203.254.224.25]) by mx.google.com with ESMTP id r4si11956594pbi.275.2012.03.24.02.28.27; Sat, 24 Mar 2012 02:28:28 -0700 (PDT) Received-SPF: neutral (google.com: 203.254.224.25 is neither permitted nor denied by best guess record for domain of thomas.abraham@linaro.org) client-ip=203.254.224.25; Authentication-Results: mx.google.com; spf=neutral (google.com: 203.254.224.25 is neither permitted nor denied by best guess record for domain of thomas.abraham@linaro.org) smtp.mail=thomas.abraham@linaro.org Received: from epcpsbgm2.samsung.com (mailout2.samsung.com [203.254.224.25]) by mailout2.samsung.com (Oracle Communications Messaging Exchange Server 7u4-19.01 64bit (built Sep 7 2010)) with ESMTP id <0M1D00GKPUBDC6G0@mailout2.samsung.com> for patches@linaro.org; Sat, 24 Mar 2012 18:28:27 +0900 (KST) X-AuditID: cbfee61b-b7baeae000004fa7-07-4f6d93bbc473 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (MMPCPMTA) with SMTP id CE.98.20391.BB39D6F4; Sat, 24 Mar 2012 18:28:27 +0900 (KST) Received: from localhost.localdomain ([107.108.73.37]) by mmp2.samsung.com (Oracle Communications Messaging Exchange Server 7u4-19.01 64bit (built Sep 7 2010)) with ESMTPA id <0M1D00F07UB7HF90@mmp2.samsung.com> for patches@linaro.org; Sat, 24 Mar 2012 18:28:27 +0900 (KST) From: Thomas Abraham To: linux-samsung-soc@vger.kernel.org Cc: devicetree-discuss@lists.ozlabs.org, rob.herring@calxeda.com, grant.likely@secretlab.ca, kgene.kim@samsung.com, linux-arm-kernel@lists.infradead.org, patches@linaro.org Subject: [PATCH v5 1/2] ARM: Exynos: Add irq_domain support for interrupt combiner Date: Sat, 24 Mar 2012 15:03:02 +0530 Message-id: <1332581583-16100-2-git-send-email-thomas.abraham@linaro.org> X-Mailer: git-send-email 1.6.6.rc2 In-reply-to: <1332581583-16100-1-git-send-email-thomas.abraham@linaro.org> References: <1332581583-16100-1-git-send-email-thomas.abraham@linaro.org> X-Brightmail-Tracker: AAAAAA== X-TM-AS-MML: No X-Gm-Message-State: ALoCoQmi08WMaI5IFo6/yrG+ealNsvCijVLI/PofXgFm2e/g5T6QIyx9zwfK50clvJzbjOqgmyAr Add irq_domain support for hardware interrupts of the interrupt combiner. The hardware interrupts of all the instances of the combiner are grouped in a single irq_domain. Cc: Grant Likely Signed-off-by: Thomas Abraham Acked-by: Rob Herring --- arch/arm/mach-exynos/common.c | 87 +++++++++++++++++++++++----------------- 1 files changed, 50 insertions(+), 37 deletions(-) diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index 85ed8b5..7518945 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -19,6 +19,8 @@ #include #include #include +#include +#include #include #include @@ -394,6 +396,7 @@ struct combiner_chip_data { void __iomem *base; }; +static struct irq_domain *combiner_irq_domain; static struct combiner_chip_data combiner_data[MAX_COMBINER_NR]; static inline void __iomem *combiner_base(struct irq_data *data) @@ -406,14 +409,14 @@ static inline void __iomem *combiner_base(struct irq_data *data) static void combiner_mask_irq(struct irq_data *data) { - u32 mask = 1 << (data->irq % 32); + u32 mask = 1 << (data->hwirq % 32); __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR); } static void combiner_unmask_irq(struct irq_data *data) { - u32 mask = 1 << (data->irq % 32); + u32 mask = 1 << (data->hwirq % 32); __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET); } @@ -469,36 +472,59 @@ static void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int i irq_set_chained_handler(irq, combiner_handle_cascade_irq); } -static void __init combiner_init(unsigned int combiner_nr, void __iomem *base, - unsigned int irq_start) +static void __init combiner_init_one(unsigned int combiner_nr, + void __iomem *base) { - unsigned int i; - unsigned int max_nr; - - if (soc_is_exynos5250()) - max_nr = EXYNOS5_MAX_COMBINER_NR; - else - max_nr = EXYNOS4_MAX_COMBINER_NR; - - if (combiner_nr >= max_nr) - BUG(); - combiner_data[combiner_nr].base = base; - combiner_data[combiner_nr].irq_offset = irq_start; + combiner_data[combiner_nr].irq_offset = irq_find_mapping( + combiner_irq_domain, combiner_nr * MAX_IRQ_IN_COMBINER); combiner_data[combiner_nr].irq_mask = 0xff << ((combiner_nr % 4) << 3); /* Disable all interrupts */ __raw_writel(combiner_data[combiner_nr].irq_mask, base + COMBINER_ENABLE_CLEAR); +} + +static int combiner_irq_domain_map(struct irq_domain *d, unsigned int irq, + irq_hw_number_t hw) +{ + irq_set_chip_and_handler(irq, &combiner_chip, handle_level_irq); + irq_set_chip_data(irq, &combiner_data[hw >> 3]); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); + return 0; +} + +static struct irq_domain_ops combiner_irq_domain_ops = { + .map = combiner_irq_domain_map, +}; - /* Setup the Linux IRQ subsystem */ +void __init combiner_init(void __iomem *combiner_base, struct device_node *np) +{ + int i, irq_base; + unsigned int max_nr, nr_irq; + + max_nr = soc_is_exynos5250() ? EXYNOS5_MAX_COMBINER_NR : + EXYNOS4_MAX_COMBINER_NR; + nr_irq = max_nr * MAX_IRQ_IN_COMBINER; + + irq_base = irq_alloc_descs(COMBINER_IRQ(0, 0), 1, nr_irq, 0); + if (IS_ERR_VALUE(irq_base)) { + irq_base = COMBINER_IRQ(0, 0); + pr_warning("%s: irq desc alloc failed. Continuing with %d as " + "linux irq base\n", __func__, irq_base); + } + + combiner_irq_domain = irq_domain_add_legacy(np, nr_irq, irq_base, 0, + &combiner_irq_domain_ops, &combiner_data); + if (WARN_ON(!combiner_irq_domain)) { + pr_warning("%s: irq domain init failed\n", __func__); + return; + } - for (i = irq_start; i < combiner_data[combiner_nr].irq_offset - + MAX_IRQ_IN_COMBINER; i++) { - irq_set_chip_and_handler(i, &combiner_chip, handle_level_irq); - irq_set_chip_data(i, &combiner_data[combiner_nr]); - set_irq_flags(i, IRQF_VALID | IRQF_PROBE); + for (i = 0; i < max_nr; i++) { + combiner_init_one(i, combiner_base + (i >> 2) * 0x10); + combiner_cascade_irq(i, IRQ_SPI(i)); } } @@ -511,7 +537,6 @@ static const struct of_device_id exynos4_dt_irq_match[] = { void __init exynos4_init_irq(void) { - int irq; unsigned int gic_bank_offset; gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000; @@ -523,12 +548,7 @@ void __init exynos4_init_irq(void) of_irq_init(exynos4_dt_irq_match); #endif - for (irq = 0; irq < EXYNOS4_MAX_COMBINER_NR; irq++) { - - combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq), - COMBINER_IRQ(irq, 0)); - combiner_cascade_irq(irq, IRQ_SPI(irq)); - } + combiner_init(S5P_VA_COMBINER_BASE, NULL); /* * The parameters of s5p_init_irq() are for VIC init. @@ -540,15 +560,8 @@ void __init exynos4_init_irq(void) void __init exynos5_init_irq(void) { - int irq; - gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU); - - for (irq = 0; irq < EXYNOS5_MAX_COMBINER_NR; irq++) { - combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq), - COMBINER_IRQ(irq, 0)); - combiner_cascade_irq(irq, IRQ_SPI(irq)); - } + combiner_init(S5P_VA_COMBINER_BASE, NULL); /* * The parameters of s5p_init_irq() are for VIC init.