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Thu, 26 Jan 2017 12:38:05 +0000 (GMT) From: Marek Szyprowski To: linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz , Chanwoo Choi Subject: [PATCH v2 1/3] clk: samsung: exynos5433: Add IDs for PHYCLK_MIPIDPHY0_* clocks Date: Thu, 26 Jan 2017 13:37:52 +0100 Message-id: <1485434274-6579-2-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1485434274-6579-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrNIsWRmVeSWpSXmKPExsWy7djP87pr33ZGGExda2GxccZ6VovrX56z Wpw/v4HdYsb5fUwWa4/cZbc4/Kad1YHNY9OqTjaPvi2rGD0+b5ILYI7isklJzcksSy3St0vg ynj99jNrwVqBitMnLrI2ME7l62Lk5JAQMJF48P0gK4QtJnHh3nq2LkYuDiGBpYwSF0+/gHI+ M0rs+nyCHabj94nd7BCJZYwSE/YtZIVwGpgk5hyczgxSxSZgKNH1tosNxBYRUJX43LYArINZ 4CmjxL3FLUwgCWGBSInDb1+CLWcBKuo7/gasmVfAXeJX2yU2iHVyEiePTQar4RTwkFj36RLY TRIC99kkZj3+ytLFyAHkyEpsOsAMUe8isfvMcShbWOLV8S1QZ8tIdHYcZIKw+xklmlq1IewZ jBLn3vJC2NYSh49fBNvFLMAnMWkbyDMg43klOtqEIEo8JM5OXcsIYTtKPDkymRni+dmMEmuP H2WfwCizgJFhFaNIamlxbnpqsalecWJucWleul5yfu4mRmCUnv53/OsOxqXHrA4xCnAwKvHw HtjRESHEmlhWXJl7iFGCg1lJhHfhy84IId6UxMqq1KL8+KLSnNTiQ4zSHCxK4rx7FlwJFxJI TyxJzU5NLUgtgskycXBKNTCGr9NnnHbeITK1cd2inAsFiQkdduElGQvb9gc9e8t+sPP8wUAG r7cpk6Yt+aw+s9Sj5apX4t7HCofOZt/K/9B5PY7pqkrep6un2aQOObGViL/n6Jn8Ju5GR/QV j1hRN3bzh/Os9yrsnD29eEd8YIDGpW1R03vOvP4ZIFHFfGnq83u8VU8kmdKVWIozEg21mIuK EwFjps2IzgIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrFLMWRmVeSWpSXmKPExsVy+t/xa7pv33ZGGMxYKGexccZ6VovrX56z Wpw/v4HdYsb5fUwWa4/cZbc4/Kad1YHNY9OqTjaPvi2rGD0+b5ILYI5ys8lITUxJLVJIzUvO T8nMS7dVCg1x07VQUshLzE21VYrQ9Q0JUlIoS8wpBfKMDNCAg3OAe7CSvl2CW8brt59ZC9YK VJw+cZG1gXEqXxcjJ4eEgInE7xO72SFsMYkL99azdTFycQgJLGGUOLF7NzOE08QkcW37PkaQ KjYBQ4mut11sILaIgKrE57YF7CBFzALPGSXe7+5nAUkIC0RKHH77khXEZgEq6jv+hhnE5hVw l/jVdokNYp2cxMljk8FqOAU8JNZ9AolzAG1zl9ixln8CI+8CRoZVjCKppcW56bnFhnrFibnF pXnpesn5uZsYgeG67djPzTsYL20MPsQowMGoxMN7YEdHhBBrYllxZe4hRgkOZiUR3oUvOyOE eFMSK6tSi/Lji0pzUosPMZoC3TSRWUo0OR8YS3kl8YYmhuaWhkbGFhbmRkZK4rwlH66ECwmk J5akZqemFqQWwfQxcXBKNTDKnQ09NrFE+b7uySVPklff1Qoqy3f+G64XcVPR1VivknH1q19F 70uYdvq9KKm80+szeUNNWcmdzAkSrrK3rn3Xu7Rw1UcuP1l9iYPiO+pZk164TL61uf+RYNHl eMusm2e5DUUaVQUkrjP9rJZdv5g1KVroVfGLe5bL0mKrn7ovvCSc+2nXWV4lluKMREMt5qLi RABG5kT2bQIAAA== X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170126123805eucas1p2fd873698f59addae8aab7ac3ad0f6de4 X-Msg-Generator: CA X-Sender-IP: 182.198.249.179 X-Local-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1B?= =?utf-8?b?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1BSam?= =?utf-8?q?sung_Electronics=1BSenior_Software_Engineer?= X-Sender-Code: =?utf-8?q?C10=1BEHQ=1BC10CD02CD027392?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20170126123805eucas1p2fd873698f59addae8aab7ac3ad0f6de4 X-RootMTR: 20170126123805eucas1p2fd873698f59addae8aab7ac3ad0f6de4 References: <1485434274-6579-1-git-send-email-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Add missing identifiers for phyclk_mipidphy0_bitclkdiv8_phy and phyclk_mipidphy0_rxclkesc0_phy clocks. Access to those clocks is needed to setup initial clock configuration for display subsystem in device tree in order to avoid dependency on the configuration left by the bootloader. Signed-off-by: Marek Szyprowski Acked-by: Krzysztof Kozlowski Acked-by: Chanwoo Choi --- drivers/clk/samsung/clk-exynos5433.c | 6 ++++-- include/dt-bindings/clock/exynos5433.h | 5 ++++- 2 files changed, 8 insertions(+), 3 deletions(-) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index 8fd7f6e88e3c..6ee91ae875c3 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -2559,8 +2559,10 @@ static void __init exynos5433_cmu_g2d_init(struct device_node *np) FRATE(0, "phyclk_mipidphy1_bitclkdiv8_phy", NULL, 0, 188000000), FRATE(0, "phyclk_mipidphy1_rxclkesc0_phy", NULL, 0, 100000000), /* PHY clocks from MIPI_DPHY0 */ - FRATE(0, "phyclk_mipidphy0_bitclkdiv8_phy", NULL, 0, 188000000), - FRATE(0, "phyclk_mipidphy0_rxclkesc0_phy", NULL, 0, 100000000), + FRATE(CLK_PHYCLK_MIPIDPHY0_BITCLKDIV8_PHY, "phyclk_mipidphy0_bitclkdiv8_phy", + NULL, 0, 188000000), + FRATE(CLK_PHYCLK_MIPIDPHY0_RXCLKESC0_PHY, "phyclk_mipidphy0_rxclkesc0_phy", + NULL, 0, 100000000), /* PHY clocks from HDMI_PHY */ FRATE(CLK_PHYCLK_HDMIPHY_TMDS_CLKO_PHY, "phyclk_hdmiphy_tmds_clko_phy", NULL, 0, 300000000), diff --git a/include/dt-bindings/clock/exynos5433.h b/include/dt-bindings/clock/exynos5433.h index 4fa6bb2136e3..be39d23e6a32 100644 --- a/include/dt-bindings/clock/exynos5433.h +++ b/include/dt-bindings/clock/exynos5433.h @@ -771,7 +771,10 @@ #define CLK_PCLK_DECON 113 -#define DISP_NR_CLK 114 +#define CLK_PHYCLK_MIPIDPHY0_BITCLKDIV8_PHY 114 +#define CLK_PHYCLK_MIPIDPHY0_RXCLKESC0_PHY 115 + +#define DISP_NR_CLK 116 /* CMU_AUD */ #define CLK_MOUT_AUD_PLL_USER 1