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Thu, 01 Feb 2024 09:22:28 -0800 (PST) X-Forwarded-Encrypted: i=0; AJvYcCUdrtxBDnY1A3xcSW6aLqqdnaZ61n5bIgrQUbPZtoaim07Ow3vHyyZM7skGO5J14mICRMK8c/V12CHhtfZnPhvhARkbATId9ksintnLX7edGzdXf0n0m+hwRVJ+fABZYnzWuHcFrxVq6D5Okm72XGhVO4ZTJQuUWlnkY9V3I1q7kiEN/h+QNnUgzwUUUKrT26bAYd0qzSvFpYjcUCHAfE+3Nly0aL3OMbUAOlvnhZgc5Cl9AFH2cYyLIgvIEJFSYmxYNNGlTIwYfNy6dDtj2BFnIJDlHnovmzTDwoD55AwIgfi9GH92V1Ibn+IFZd3U8s9FEz7fpqAbR7z3RFrw0O1l5MweKVBCIC7443Hxw8diGijYa05UCV4QCliR0W1McSSdYdYlCdl6JX8hU/Yvrmz74jao1Dk/BEaiF4XGe9NNpnpedjpot8YAJqydMOO8P+ME/LbWMuQ3YS8b2wcmvEKS556Epq3q5Kfwt90HwTHiUjHBftpZq8dLMmYhWMwlTHjKZdrSBmTVbSDSlWsm51XYoaorqwsdI/jMTcuyTgRoopkLOGogGhm8bxqECVH4Dp4= Received: from tux.Home ([2a02:c7c:7213:c700:e992:6869:474c:a63f]) by smtp.gmail.com with ESMTPSA id f15-20020a056000036f00b00337d84efaf7sm16733582wrf.74.2024.02.01.09.22.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Feb 2024 09:22:27 -0800 (PST) From: Alexey Klimov To: krzysztof.kozlowski@linaro.org, alim.akhtar@samsung.com, linux-samsung-soc@vger.kernel.org, semen.protsenko@linaro.org, peter.griffin@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, klimov.linux@gmail.com, kernel-team@android.com, tudor.ambarus@linaro.org, andre.draszik@linaro.org, saravanak@google.com, willmcvicker@google.com, arnd@arndb.de Subject: [PATCH 4/4] soc: samsung: exynos-chipid: fix revision calculation for gs101 Date: Thu, 1 Feb 2024 17:22:24 +0000 Message-ID: <20240201172224.574238-4-alexey.klimov@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240201172224.574238-1-alexey.klimov@linaro.org> References: <20240201172224.574238-1-alexey.klimov@linaro.org> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The main revision for gs101 SoC is not reported in the CHIPID_REV register. The gs101 Product ID and revisions registers have a behaviour split between old Exynos SoCs and new SoCs. The sub-revision is reported in CHIPID_REV register in [19:16] bits but main revision is still present in Product ID [7:0]. To construct soc_info->revision correctly for gs101 the main_rev should not be reset from a value read from CHIPID_REV. Signed-off-by: Alexey Klimov --- drivers/soc/samsung/exynos-chipid.c | 20 ++++++++++++++++---- include/linux/soc/samsung/exynos-chipid.h | 1 + 2 files changed, 17 insertions(+), 4 deletions(-) diff --git a/drivers/soc/samsung/exynos-chipid.c b/drivers/soc/samsung/exynos-chipid.c index 7fee6094db12..3b952ffd8cf7 100644 --- a/drivers/soc/samsung/exynos-chipid.c +++ b/drivers/soc/samsung/exynos-chipid.c @@ -87,14 +87,26 @@ static int exynos_chipid_get_chipid_info(struct regmap *regmap, soc_info->product_id = val & EXYNOS_MASK; if (data->rev_reg != EXYNOS_CHIPID_REG_PRO_ID) { - ret = regmap_read(regmap, data->rev_reg, &val); + unsigned int val2; + + ret = regmap_read(regmap, data->rev_reg, &val2); if (ret < 0) return ret; + + if (data->main_rev_shift == 0) + main_rev = (val >> data->main_rev_shift) + & EXYNOS_REV_PART_MASK_GS101; + else + main_rev = (val2 >> data->main_rev_shift) + & EXYNOS_REV_PART_MASK; + + sub_rev = (val2 >> data->sub_rev_shift) & EXYNOS_REV_PART_MASK; + } else { + main_rev = (val >> data->main_rev_shift) & EXYNOS_REV_PART_MASK; + sub_rev = (val >> data->sub_rev_shift) & EXYNOS_REV_PART_MASK; } - main_rev = (val >> data->main_rev_shift) & EXYNOS_REV_PART_MASK; - sub_rev = (val >> data->sub_rev_shift) & EXYNOS_REV_PART_MASK; - soc_info->revision = (main_rev << EXYNOS_REV_PART_SHIFT) | sub_rev; + soc_info->revision = (main_rev << EXYNOS_REV_PART_SHIFT) | sub_rev; return 0; } diff --git a/include/linux/soc/samsung/exynos-chipid.h b/include/linux/soc/samsung/exynos-chipid.h index 62f0e2531068..1eb13068f513 100644 --- a/include/linux/soc/samsung/exynos-chipid.h +++ b/include/linux/soc/samsung/exynos-chipid.h @@ -10,6 +10,7 @@ #define EXYNOS_CHIPID_REG_PRO_ID 0x00 #define EXYNOS_REV_PART_MASK 0xf +#define EXYNOS_REV_PART_MASK_GS101 0xff #define EXYNOS_REV_PART_SHIFT 4 #define EXYNOS_MASK 0xfffff000