diff mbox series

[RRC,v1,1/3] thermal/drivers/exynos: Remove unused base_second mapping and references

Message ID 20250616163831.8138-2-linux.amoon@gmail.com
State New
Headers show
Series Simplify Exynos TMU IRQ clean logic | expand

Commit Message

Anand Moon June 16, 2025, 4:38 p.m. UTC 
Following change removes the base_second field eliminates its mapping
in exynos_map_dt_data(), and updates the TRIMINFO access logic in
exynos4412_tmu_initialize() to use base for both Exynos5420 and
Exynos5420_TRIMINFO SoCs, as base_second is not used further in
in this code.
This cleanup simplifies the code and reduces unnecessary
memory mapping.

Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
 drivers/thermal/samsung/exynos_tmu.c | 20 +++++---------------
 1 file changed, 5 insertions(+), 15 deletions(-)

Comments

Mateusz Majewski June 18, 2025, 12:58 p.m. UTC | #1 
>  	/* On exynos5420 the triminfo register is in the shared space */
> -	if (data->soc == SOC_ARCH_EXYNOS5420_TRIMINFO)
> -		trim_info = readl(data->base_second + EXYNOS_TMU_REG_TRIMINFO);
> -	else
> +	if (data->soc == SOC_ARCH_EXYNOS5420 ||
> +			data->soc == SOC_ARCH_EXYNOS5420_TRIMINFO) {
>  		trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
> -
> -	sanitize_temp_error(data, trim_info);
> +		sanitize_temp_error(data, trim_info);
> +	}

If I understand correctly, this means that the triminfo will no longer
be read on other SoCs calling this function (3250, 4412, 5250, 5260). Is
this intended?

By the way, are we sure that data->base_second really is unnecessary?
According to the bindings documentation (in
Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml),
the different address is necessary because the triminfo registers are
misplaced on 5420.

Thank you,
Mateusz Majewski
diff mbox series

Patch

diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
index 47a99b3c5395..c625eddcb9f3 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -139,12 +139,11 @@  enum soc_type {
  * struct exynos_tmu_data : A structure to hold the private data of the TMU
  *			    driver
  * @base: base address of the single instance of the TMU controller.
- * @base_second: base address of the common registers of the TMU controller.
  * @irq: irq number of the TMU controller.
  * @soc: id of the SOC type.
  * @lock: lock to implement synchronization.
  * @clk: pointer to the clock structure.
- * @clk_sec: pointer to the clock structure for accessing the base_second.
+ * @clk_sec: pointer to the clock structure for accessing the gpu clk.
  * @sclk: pointer to the clock structure for accessing the tmu special clk.
  * @cal_type: calibration type for temperature
  * @efuse_value: SoC defined fuse value
@@ -172,7 +171,6 @@  enum soc_type {
  */
 struct exynos_tmu_data {
 	void __iomem *base;
-	void __iomem *base_second;
 	int irq;
 	enum soc_type soc;
 	struct mutex lock;
@@ -460,12 +458,11 @@  static void exynos4412_tmu_initialize(struct platform_device *pdev)
 	}
 
 	/* On exynos5420 the triminfo register is in the shared space */
-	if (data->soc == SOC_ARCH_EXYNOS5420_TRIMINFO)
-		trim_info = readl(data->base_second + EXYNOS_TMU_REG_TRIMINFO);
-	else
+	if (data->soc == SOC_ARCH_EXYNOS5420 ||
+			data->soc == SOC_ARCH_EXYNOS5420_TRIMINFO) {
 		trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
-
-	sanitize_temp_error(data, trim_info);
+		sanitize_temp_error(data, trim_info);
+	}
 }
 
 static void exynos5433_tmu_set_low_temp(struct exynos_tmu_data *data, u8 temp)
@@ -964,13 +961,6 @@  static int exynos_map_dt_data(struct platform_device *pdev)
 		return -ENODEV;
 	}
 
-	data->base_second = devm_ioremap(&pdev->dev, res.start,
-					resource_size(&res));
-	if (!data->base_second) {
-		dev_err(&pdev->dev, "Failed to ioremap memory\n");
-		return -ENOMEM;
-	}
-
 	return 0;
 }