mbox series

[V2,0/3] Add support for multiple ICE allocators

Message ID 20241029113003.18820-1-quic_rdwivedi@quicinc.com
Headers show
Series Add support for multiple ICE allocators | expand

Message

Ram Kumar Dwivedi Oct. 29, 2024, 11:30 a.m. UTC 
Add support for ICE allocators for Qualcomm UFS V5.0 and above,
which uses a pool of crypto cores for TX stream (UFS Write – 
Encryption) and RX stream (UFS Read – Decryption).

Using these allocators, crypto cores can be dynamically allocated
to either RX stream or TX stream based on allocator selected.
Qualcomm UFS controller supports three ICE allocators:
Floor based allocator, Static allocator and Instantaneous allocator
to share crypto cores between TX and RX stream.

Floor Based allocation is selected by default after power On or Reset.

Changes from v1:
1. Addressed Rob's and Krzysztof's comment to fix dt binding compilation 
   issue.
2. Addressed Rob's comment to enable the nodes in example.
3. Addressed Eric's comment to rephrase patch commit description.
   Used terminology as ICE allocator instead of ICE algorithm.
4. Addressed Christophe's comment to align the comment as per kernel doc.

Ram Kumar Dwivedi (3):
  dt-bindings: ufs: qcom: Document ice configuration table
  arm64: dts: qcom: sm8650: Add ICE allocator entries
  scsi: ufs: qcom: Add support for multiple ICE allocators

 .../devicetree/bindings/ufs/qcom,ufs.yaml     |  24 ++
 arch/arm64/boot/dts/qcom/sm8650.dtsi          |  19 ++
 drivers/ufs/host/ufs-qcom.c                   | 228 ++++++++++++++++++
 drivers/ufs/host/ufs-qcom.h                   |  38 ++-
 4 files changed, 308 insertions(+), 1 deletion(-)

Comments

Krzysztof Kozlowski Oct. 29, 2024, 12:14 p.m. UTC | #1 
On 29/10/2024 12:30, Ram Kumar Dwivedi wrote:
> +
> +				instantaneous {
> +					ice-allocator-name = "instantaneous";
> +					num-core = <28 28 15 13>;
> +					status = "okay";

NAK, not much improved... and you ignored my response.

Best regards,
Krzysztof