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Thu, 28 May 2020 01:32:28 +0000 (GMT) From: Alim Akhtar To: robh@kernel.org Cc: devicetree@vger.kernel.org, linux-scsi@vger.kernel.org, krzk@kernel.org, avri.altman@wdc.com, martin.petersen@oracle.com, kwmad.kim@samsung.com, stanley.chu@mediatek.com, cang@codeaurora.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Alim Akhtar Subject: [PATCH v10 03/10] scsi: ufs: add quirk to enable host controller without hce Date: Thu, 28 May 2020 06:46:51 +0530 Message-Id: <20200528011658.71590-4-alim.akhtar@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200528011658.71590-1-alim.akhtar@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpileLIzCtJLcpLzFFi42LZdlhTXXedyPk4gzO3JC0ezNvGZvHy51U2 i0/rl7FazD9yjtXi/PkN7BY3txxlsdj0+BqrxeVdc9gsZpzfx2TRfX0Hm8Xy4/+YLP7v2cFu sXTrTUYHXo/Lfb1MHptWdbJ5bF5S79Fycj+Lx8ent1g8+rasYvT4vEnOo/1AN1MARxSXTUpq TmZZapG+XQJXxqwXh9gKNshVNDV+YWpgPCXRxcjJISFgIrG1/wRzFyMXh5DAbkaJp1c2M0I4 nxglPv16zgLhfGaUWHx3KQtMy8zn19khErsYJZYunQbV0sIk8eXLRFaQKjYBbYm707cwgdgi AsISR761MYLYzAI3mCQerHQBsYUFwiWatsxnA7FZBFQl/pxbyQ5i8wrYSJzsaYfaJi+xesMB oAM5ODgFbCX2TnAA2SUh0Mohsej7FEaQuISAi8SRo9oQ5cISr45vYYewpSQ+v9vLBlGSLdGz yxgiXCOxdN4xqOn2EgeuzGEBKWEW0JRYv0sf4kg+id7fT5ggOnklOtqEIKpVJZrfXYXqlJaY 2N3NCmF7SFx6PB0aVBMYJc5NXM88gVF2FsLUBYyMqxglUwuKc9NTi00LjPNSy/WKE3OLS/PS 9ZLzczcxgpOJlvcOxkcPPugdYmTiYDzEKMHBrCTC63T2dJwQb0piZVVqUX58UWlOavEhRmkO FiVxXqUfZ+KEBNITS1KzU1MLUotgskwcnFINTHE108zkT5aznIr0uHfNZF5ymdMu4S8lydty pp7SUso7bVhiWrRNRGT74g+byo8min7dP+vquZ+sPm/q9qVfrdjv2xz3hP2MwOPH8s732srD EsS/6by3krxx99chPTNvXe8W/zfvf8nZnJ00kzu+5GEzw/y+76v+3TzuIdiQsbEz/W+S8HnW OxcYY7/LvJ64VU/6wBrhWfGfj2zhNf+887NqjcbC2X5/IqYyXhCZ1f/4hmKfSPOrZB+T8Dmd PE7yl2r8HL+Z7vRvnP2M27mIzUzJ+/Pb019ZfDl3TOY7fORVXqXQlnfibzkEpu2pKPjlOyk3 tu0663ullQ1dmYaJ/4pL8g3Zo9heH/jU7MLQo8RSnJFoqMVcVJwIAMJkcpuVAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrELMWRmVeSWpSXmKPExsWy7bCSnO46kfNxBpMWs1g8mLeNzeLlz6ts Fp/WL2O1mH/kHKvF+fMb2C1ubjnKYrHp8TVWi8u75rBZzDi/j8mi+/oONovlx/8xWfzfs4Pd YunWm4wOvB6X+3qZPDat6mTz2Lyk3qPl5H4Wj49Pb7F49G1ZxejxeZOcR/uBbqYAjigum5TU nMyy1CJ9uwSujFkvDrEVbJCraGr8wtTAeEqii5GTQ0LARGLm8+vsXYxcHEICOxgldnxfwwSR kJa4vnECO4QtLLHy33OooiYmiT+vDjCDJNgEtCXuTt8C1iACVHTkWxsjiM0s8IxJ4tTDUhBb WCBUYsX8LrBBLAKqEn/OrQSzeQVsJE72tLNALJCXWL0BZCYHB6eArcTeCQ4gYSGgkgmr9jJO YORbwMiwilEytaA4Nz232LDAKC+1XK84Mbe4NC9dLzk/dxMjOJi1tHYw7ln1Qe8QIxMH4yFG CQ5mJRFep7On44R4UxIrq1KL8uOLSnNSiw8xSnOwKInzfp21ME5IID2xJDU7NbUgtQgmy8TB KdXANFVO3uT3Lo5pwbw9l666Wud31e3apuHI3nTm/9szuunyk9jip+iL+bVbr3xh49TyJMNz 0b+vncvPv9WpfcN+bMaZrrMr5Fo+r5Gb+3lftm3J92Ihtzjxk1/9psl9+jlnV11owvawcy6O txynr65crn1bKW/L3fdffu+2467Weibez2B2ii3oq7W2Qc+KQHWh+TmXAwt9qyv+Les8sbf9 +ZIH66S+fpmw4IbWZJte/SKPXA7WC5LLpv+/XfrZKcnG2PuHUO70ivkibYX1hcv3PdqTvMCw WLYgcWMM78wjV81EQkV2dC15HOK7anGN1cPPxpzn7ly9XM1d8I/b0V97lVa691KviFDu2JAn PCJCSizFGYmGWsxFxYkA+hkfH9UCAAA= X-CMS-MailID: 20200528013230epcas5p37b2d1980cfccf593242bef11e2076eb8 X-Msg-Generator: CA CMS-TYPE: 105P X-CMS-RootMailID: 20200528013230epcas5p37b2d1980cfccf593242bef11e2076eb8 References: <20200528011658.71590-1-alim.akhtar@samsung.com> Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Some host controllers don't support host controller enable via HCE. Reviewed-by: Can Guo Reviewed-by: Avri Altman Signed-off-by: Seungwon Jeon Signed-off-by: Alim Akhtar --- drivers/scsi/ufs/ufshcd.c | 76 +++++++++++++++++++++++++++++++++++++-- drivers/scsi/ufs/ufshcd.h | 6 ++++ 2 files changed, 80 insertions(+), 2 deletions(-) diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index 0e9704da58bd..ee30ed6cc805 100644 --- a/drivers/scsi/ufs/ufshcd.c +++ b/drivers/scsi/ufs/ufshcd.c @@ -3534,6 +3534,52 @@ static int ufshcd_dme_link_startup(struct ufs_hba *hba) "dme-link-startup: error code %d\n", ret); return ret; } +/** + * ufshcd_dme_reset - UIC command for DME_RESET + * @hba: per adapter instance + * + * DME_RESET command is issued in order to reset UniPro stack. + * This function now deal with cold reset. + * + * Returns 0 on success, non-zero value on failure + */ +static int ufshcd_dme_reset(struct ufs_hba *hba) +{ + struct uic_command uic_cmd = {0}; + int ret; + + uic_cmd.command = UIC_CMD_DME_RESET; + + ret = ufshcd_send_uic_cmd(hba, &uic_cmd); + if (ret) + dev_err(hba->dev, + "dme-reset: error code %d\n", ret); + + return ret; +} + +/** + * ufshcd_dme_enable - UIC command for DME_ENABLE + * @hba: per adapter instance + * + * DME_ENABLE command is issued in order to enable UniPro stack. + * + * Returns 0 on success, non-zero value on failure + */ +static int ufshcd_dme_enable(struct ufs_hba *hba) +{ + struct uic_command uic_cmd = {0}; + int ret; + + uic_cmd.command = UIC_CMD_DME_ENABLE; + + ret = ufshcd_send_uic_cmd(hba, &uic_cmd); + if (ret) + dev_err(hba->dev, + "dme-reset: error code %d\n", ret); + + return ret; +} static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba) { @@ -4251,7 +4297,7 @@ static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep) } /** - * ufshcd_hba_enable - initialize the controller + * ufshcd_hba_execute_hce - initialize the controller * @hba: per adapter instance * * The controller resets itself and controller firmware initialization @@ -4260,7 +4306,7 @@ static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep) * * Returns 0 on success, non-zero value on failure */ -int ufshcd_hba_enable(struct ufs_hba *hba) +static int ufshcd_hba_execute_hce(struct ufs_hba *hba) { int retry; @@ -4308,6 +4354,32 @@ int ufshcd_hba_enable(struct ufs_hba *hba) return 0; } + +int ufshcd_hba_enable(struct ufs_hba *hba) +{ + int ret; + + if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) { + ufshcd_set_link_off(hba); + ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE); + + /* enable UIC related interrupts */ + ufshcd_enable_intr(hba, UFSHCD_UIC_MASK); + ret = ufshcd_dme_reset(hba); + if (!ret) { + ret = ufshcd_dme_enable(hba); + if (!ret) + ufshcd_vops_hce_enable_notify(hba, POST_CHANGE); + if (ret) + dev_err(hba->dev, + "Host controller enable failed with non-hce\n"); + } + } else { + ret = ufshcd_hba_execute_hce(hba); + } + + return ret; +} EXPORT_SYMBOL_GPL(ufshcd_hba_enable); static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer) diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h index 53096642f9a8..f8d08cb9caf7 100644 --- a/drivers/scsi/ufs/ufshcd.h +++ b/drivers/scsi/ufs/ufshcd.h @@ -529,6 +529,12 @@ enum ufshcd_quirks { * that the interrupt aggregation timer and counter are reset by s/w. */ UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR = 1 << 7, + + /* + * This quirks needs to be enabled if host controller cannot be + * enabled via HCE register. + */ + UFSHCI_QUIRK_BROKEN_HCE = 1 << 8, }; enum ufshcd_caps {