Message ID | 20240213-msm8996-fix-ufs-v2-1-650758c26458@linaro.org |
---|---|
State | Superseded |
Headers | show |
Series | scsi: ufs: qcom: fix UFSDHCD support on MSM8996 platform | expand |
On Tue, Feb 13, 2024 at 01:22:17PM +0200, Dmitry Baryshkov wrote: > The MSM8996 DT doesn't provide frequency limits for the core_clk_unipro > clock, which results in miscalculation of the cycles_in_1us value. > Provide the backwards-compatible default to support existing MSM8996 > DT files. > > Fixes: b4e13e1ae95e ("scsi: ufs: qcom: Add multiple frequency support for MAX_CORE_CLK_1US_CYCLES") > Cc: Nitin Rawat <quic_nitirawa@quicinc.com> > Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> CC stable list? Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> - Mani > --- > drivers/ufs/host/ufs-qcom.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c > index 0aeaee1c564c..79f8cb377710 100644 > --- a/drivers/ufs/host/ufs-qcom.c > +++ b/drivers/ufs/host/ufs-qcom.c > @@ -1210,8 +1210,10 @@ static int ufs_qcom_set_core_clk_ctrl(struct ufs_hba *hba, bool is_scale_up) > > list_for_each_entry(clki, head, list) { > if (!IS_ERR_OR_NULL(clki->clk) && > - !strcmp(clki->name, "core_clk_unipro")) { > - if (is_scale_up) > + !strcmp(clki->name, "core_clk_unipro")) { > + if (!clki->max_freq) > + cycles_in_1us = 150; /* default for backwards compatibility */ > + else if (is_scale_up) > cycles_in_1us = ceil(clki->max_freq, (1000 * 1000)); > else > cycles_in_1us = ceil(clk_get_rate(clki->clk), (1000 * 1000)); > > -- > 2.39.2 >
diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 0aeaee1c564c..79f8cb377710 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -1210,8 +1210,10 @@ static int ufs_qcom_set_core_clk_ctrl(struct ufs_hba *hba, bool is_scale_up) list_for_each_entry(clki, head, list) { if (!IS_ERR_OR_NULL(clki->clk) && - !strcmp(clki->name, "core_clk_unipro")) { - if (is_scale_up) + !strcmp(clki->name, "core_clk_unipro")) { + if (!clki->max_freq) + cycles_in_1us = 150; /* default for backwards compatibility */ + else if (is_scale_up) cycles_in_1us = ceil(clki->max_freq, (1000 * 1000)); else cycles_in_1us = ceil(clk_get_rate(clki->clk), (1000 * 1000));