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Bottomley" , "Martin K. Petersen" , Nitin Rawat , Can Guo , Naveen Kumar Goud Arepalli , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Avri Altman , Bart Van Assche , Andy Gross Cc: linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1347; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=mW0FO82P9i9mtiqyO3ysE5mu6PqL/zVStjt8u6ip+SM=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBly1DqCMaalBck7dNtUqL5D/MI74MhqWXnmNzCw g91Dns3Mt6JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZctQ6gAKCRCLPIo+Aiko 1co9CACmqrWuSOIobvzElflz90Jq2rTpGNE0+MoWeF5EHPUVGMRDMXZ57vgldw1EvyBE7bebVY7 bfDbH3zSLreYNY16T2FhSqwcvWITVlEt0y2tNoTJJVBFQsV8OqfC9QzNFhrd07VysxbZZHC0Bb8 QG4oyZ0hV3GqCCwCx8c3LCzDHPV70hL0EXUfPIgy6t1H4fwKox0AZhiE8q5lnUjUEORb4LqN41K QFVRvtetMggD0PFIJYhDl+D7/3+t7PbEdP7skeXESpaLWsh6S1wOyIfW4qRfFF540oxexqTNVK6 ji4rGKyriEEWiwVWSMHBy3NS4wq7F1G2n6R6kGfp2zhjUUZd X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The MSM8996 DT doesn't provide frequency limits for the core_clk_unipro clock, which results in miscalculation of the cycles_in_1us value. Provide the backwards-compatible default to support existing MSM8996 DT files. Fixes: b4e13e1ae95e ("scsi: ufs: qcom: Add multiple frequency support for MAX_CORE_CLK_1US_CYCLES") Cc: Nitin Rawat Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Reviewed-by: Manivannan Sadhasivam --- drivers/ufs/host/ufs-qcom.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 0aeaee1c564c..79f8cb377710 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -1210,8 +1210,10 @@ static int ufs_qcom_set_core_clk_ctrl(struct ufs_hba *hba, bool is_scale_up) list_for_each_entry(clki, head, list) { if (!IS_ERR_OR_NULL(clki->clk) && - !strcmp(clki->name, "core_clk_unipro")) { - if (is_scale_up) + !strcmp(clki->name, "core_clk_unipro")) { + if (!clki->max_freq) + cycles_in_1us = 150; /* default for backwards compatibility */ + else if (is_scale_up) cycles_in_1us = ceil(clki->max_freq, (1000 * 1000)); else cycles_in_1us = ceil(clk_get_rate(clki->clk), (1000 * 1000));