From patchwork Wed Nov 6 14:54:58 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 21382 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-qe0-f69.google.com (mail-qe0-f69.google.com [209.85.128.69]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 3CF3725E16 for ; Wed, 6 Nov 2013 14:55:09 +0000 (UTC) Received: by mail-qe0-f69.google.com with SMTP id 6sf18586298qeb.4 for ; Wed, 06 Nov 2013 06:55:08 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=ybzzA5wP0JJ6QwhV0/0YWiZpFHNfVBzHiZTx1kkjF0U=; b=Jd/zNPLTh6GcelO0Ymqa9s86vGuG/0bYGTAl7Bpt4T1zE6MvIIgRSvPvVpAR33UJ7E cM/qb3C96fIEViOQeKbwO2Bn6QICRZ2a0lF57pZuLsz6JP2YWhCp4VIWCeVxoGWSPxiE ITW+NXxnCGSLgqEQMvkMtkiv4+mcGQh0+MBTlJyhQ7jaJBW5PGrhC4xrKHK63zVll2XQ v1r0+M4i0SZFdlulCPXpF++1iky8ZpCNLiZ09xYu+tJW3pYbxLKyIN4rxr7b/Teyb+01 G6jYSSrHf5yPL1/KYqfGJ7E1NbL5Qn9mFywzNL7BwyewgQfZ8GKlAkJMaVxNNUNssM5u sfBw== X-Gm-Message-State: ALoCoQmBl7BME3puwL37unQ1eoagp6TPLktMnrAChsWlFXxn019lcthjVZPN1QAOEdgg1+RAfJ7n X-Received: by 10.58.237.10 with SMTP id uy10mr1154888vec.16.1383749708794; Wed, 06 Nov 2013 06:55:08 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.71.83 with SMTP id s19ls741853qeu.7.gmail; Wed, 06 Nov 2013 06:55:08 -0800 (PST) X-Received: by 10.58.255.233 with SMTP id at9mr2776779ved.20.1383749708647; Wed, 06 Nov 2013 06:55:08 -0800 (PST) Received: from mail-vc0-f179.google.com (mail-vc0-f179.google.com [209.85.220.179]) by mx.google.com with ESMTPS id pu5si7201383veb.21.2013.11.06.06.55.08 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 06 Nov 2013 06:55:08 -0800 (PST) Received-SPF: neutral (google.com: 209.85.220.179 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.220.179; Received: by mail-vc0-f179.google.com with SMTP id hz11so6799900vcb.10 for ; Wed, 06 Nov 2013 06:55:08 -0800 (PST) X-Received: by 10.220.58.1 with SMTP id e1mr2765334vch.0.1383749708356; Wed, 06 Nov 2013 06:55:08 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp289383vcz; Wed, 6 Nov 2013 06:55:07 -0800 (PST) X-Received: by 10.180.12.111 with SMTP id x15mr2896839wib.0.1383749707092; Wed, 06 Nov 2013 06:55:07 -0800 (PST) Received: from mail-wg0-f54.google.com (mail-wg0-f54.google.com [74.125.82.54]) by mx.google.com with ESMTPS id gd10si4049241wic.44.2013.11.06.06.55.06 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 06 Nov 2013 06:55:07 -0800 (PST) Received-SPF: neutral (google.com: 74.125.82.54 is neither permitted nor denied by best guess record for domain of linus.walleij@linaro.org) client-ip=74.125.82.54; Received: by mail-wg0-f54.google.com with SMTP id c11so4934921wgh.21 for ; Wed, 06 Nov 2013 06:55:06 -0800 (PST) X-Received: by 10.194.89.105 with SMTP id bn9mr102703wjb.82.1383749706443; Wed, 06 Nov 2013 06:55:06 -0800 (PST) Received: from localhost.localdomain ([85.235.11.236]) by mx.google.com with ESMTPSA id y11sm25116858wie.7.2013.11.06.06.55.04 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Nov 2013 06:55:05 -0800 (PST) From: Linus Walleij To: linux-gpio@vger.kernel.org, Andrew Victor , Nicolas Ferre , Jean-Christophe Plagniol-Villard , linux-serial@vger.kernel.org, Greg Kroah-Hartman Cc: Alexandre Courbot , linux-arm-kernel@lists.infradead.org, Linus Walleij Subject: [PATCH v3] ARM/serial: at91: switch atmel serial to use gpiolib Date: Wed, 6 Nov 2013 15:54:58 +0100 Message-Id: <1383749698-26523-1-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 1.8.3.1 X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: linus.walleij@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.179 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This passes the errata fix using a GPIO to control the RTS pin on one of the AT91 chips to use gpiolib instead of the AT91-specific interfaces. Also remove the reliance on compile-time #defines and the cpu_* check and rely on the platform passing down the proper GPIO pin through platform data. This is a prerequisite for getting rid of the local GPIO implementation in the AT91 platform and move toward multiplatform. The patch also adds device tree support for getting the RTS GPIO pin from the device tree on DT boot paths. Signed-off-by: Nicolas Ferre Signed-off-by: Linus Walleij --- ChangeLog v2->v3: - Instead of disallowing GPIO 0 to be used for the RTS signal to allow null-initialized platform data to mean "no RTS GPIO", be more generic and actually allow it, and patch every instance of atmel_uart_data to set .rts_gpio to -EINVAL except for the one case where we actually use pin 21 for RTS over GPIO. ChangeLog v1->v2: - Skip check for UART base address from leftover hack, if we have an RTS GPIO we just use it. - Set default error value on GPIO pin to -EINVAL - Fold in a device tree support patch from Nicolas Ferre --- .../devicetree/bindings/serial/atmel-usart.txt | 3 ++ arch/arm/mach-at91/at91rm9200_devices.c | 5 ++ arch/arm/mach-at91/at91sam9260_devices.c | 7 +++ arch/arm/mach-at91/at91sam9261_devices.c | 4 ++ arch/arm/mach-at91/at91sam9263_devices.c | 4 ++ arch/arm/mach-at91/at91sam9g45_devices.c | 5 ++ arch/arm/mach-at91/at91sam9rl_devices.c | 5 ++ drivers/tty/serial/atmel_serial.c | 55 +++++++++++++++------- include/linux/platform_data/atmel.h | 1 + 9 files changed, 71 insertions(+), 18 deletions(-) diff --git a/Documentation/devicetree/bindings/serial/atmel-usart.txt b/Documentation/devicetree/bindings/serial/atmel-usart.txt index 2191dcb9f1da..3adc61c2e4ca 100644 --- a/Documentation/devicetree/bindings/serial/atmel-usart.txt +++ b/Documentation/devicetree/bindings/serial/atmel-usart.txt @@ -10,6 +10,8 @@ Required properties: Optional properties: - atmel,use-dma-rx: use of PDC or DMA for receiving data - atmel,use-dma-tx: use of PDC or DMA for transmitting data +- rts-gpios: specify a GPIO for RTS line. It will use specified PIO instead of the peripheral + function pin for the USART RTS feature. If unsure, don't specify this property. - add dma bindings for dma transfer: - dmas: DMA specifier, consisting of a phandle to DMA controller node, memory peripheral interface and USART DMA channel ID, FIFO configuration. @@ -28,6 +30,7 @@ Example: interrupts = <7>; atmel,use-dma-rx; atmel,use-dma-tx; + rts-gpios = <&pioD 15 0>; }; - use DMA: diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c index c721e9b08066..f46d0e92b2b6 100644 --- a/arch/arm/mach-at91/at91rm9200_devices.c +++ b/arch/arm/mach-at91/at91rm9200_devices.c @@ -923,6 +923,7 @@ static struct resource dbgu_resources[] = { static struct atmel_uart_data dbgu_data = { .use_dma_tx = 0, .use_dma_rx = 0, /* DBGU not capable of receive DMA */ + .rts_gpio = -EINVAL, }; static u64 dbgu_dmamask = DMA_BIT_MASK(32); @@ -961,6 +962,7 @@ static struct resource uart0_resources[] = { static struct atmel_uart_data uart0_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = AT91_PIN_PA21, }; static u64 uart0_dmamask = DMA_BIT_MASK(32); @@ -1010,6 +1012,7 @@ static struct resource uart1_resources[] = { static struct atmel_uart_data uart1_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart1_dmamask = DMA_BIT_MASK(32); @@ -1061,6 +1064,7 @@ static struct resource uart2_resources[] = { static struct atmel_uart_data uart2_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart2_dmamask = DMA_BIT_MASK(32); @@ -1104,6 +1108,7 @@ static struct resource uart3_resources[] = { static struct atmel_uart_data uart3_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart3_dmamask = DMA_BIT_MASK(32); diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c index 428abfc14848..bcf4a161a3d8 100644 --- a/arch/arm/mach-at91/at91sam9260_devices.c +++ b/arch/arm/mach-at91/at91sam9260_devices.c @@ -819,6 +819,7 @@ static struct resource dbgu_resources[] = { static struct atmel_uart_data dbgu_data = { .use_dma_tx = 0, .use_dma_rx = 0, /* DBGU not capable of receive DMA */ + .rts_gpio = -EINVAL, }; static u64 dbgu_dmamask = DMA_BIT_MASK(32); @@ -857,6 +858,7 @@ static struct resource uart0_resources[] = { static struct atmel_uart_data uart0_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart0_dmamask = DMA_BIT_MASK(32); @@ -908,6 +910,7 @@ static struct resource uart1_resources[] = { static struct atmel_uart_data uart1_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart1_dmamask = DMA_BIT_MASK(32); @@ -951,6 +954,7 @@ static struct resource uart2_resources[] = { static struct atmel_uart_data uart2_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart2_dmamask = DMA_BIT_MASK(32); @@ -994,6 +998,7 @@ static struct resource uart3_resources[] = { static struct atmel_uart_data uart3_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart3_dmamask = DMA_BIT_MASK(32); @@ -1037,6 +1042,7 @@ static struct resource uart4_resources[] = { static struct atmel_uart_data uart4_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart4_dmamask = DMA_BIT_MASK(32); @@ -1075,6 +1081,7 @@ static struct resource uart5_resources[] = { static struct atmel_uart_data uart5_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart5_dmamask = DMA_BIT_MASK(32); diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c index 4e02e9271ac9..d5b08ef9e848 100644 --- a/arch/arm/mach-at91/at91sam9261_devices.c +++ b/arch/arm/mach-at91/at91sam9261_devices.c @@ -880,6 +880,7 @@ static struct resource dbgu_resources[] = { static struct atmel_uart_data dbgu_data = { .use_dma_tx = 0, .use_dma_rx = 0, /* DBGU not capable of receive DMA */ + .rts_gpio = -EINVAL, }; static u64 dbgu_dmamask = DMA_BIT_MASK(32); @@ -918,6 +919,7 @@ static struct resource uart0_resources[] = { static struct atmel_uart_data uart0_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart0_dmamask = DMA_BIT_MASK(32); @@ -961,6 +963,7 @@ static struct resource uart1_resources[] = { static struct atmel_uart_data uart1_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart1_dmamask = DMA_BIT_MASK(32); @@ -1004,6 +1007,7 @@ static struct resource uart2_resources[] = { static struct atmel_uart_data uart2_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart2_dmamask = DMA_BIT_MASK(32); diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c index 3a384ef27cf6..22b13c6226cb 100644 --- a/arch/arm/mach-at91/at91sam9263_devices.c +++ b/arch/arm/mach-at91/at91sam9263_devices.c @@ -1325,6 +1325,7 @@ static struct resource dbgu_resources[] = { static struct atmel_uart_data dbgu_data = { .use_dma_tx = 0, .use_dma_rx = 0, /* DBGU not capable of receive DMA */ + .rts_gpio = -EINVAL, }; static u64 dbgu_dmamask = DMA_BIT_MASK(32); @@ -1363,6 +1364,7 @@ static struct resource uart0_resources[] = { static struct atmel_uart_data uart0_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart0_dmamask = DMA_BIT_MASK(32); @@ -1406,6 +1408,7 @@ static struct resource uart1_resources[] = { static struct atmel_uart_data uart1_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart1_dmamask = DMA_BIT_MASK(32); @@ -1449,6 +1452,7 @@ static struct resource uart2_resources[] = { static struct atmel_uart_data uart2_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart2_dmamask = DMA_BIT_MASK(32); diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c index 6b8effbffc28..89f95ed711c6 100644 --- a/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/arch/arm/mach-at91/at91sam9g45_devices.c @@ -1588,6 +1588,7 @@ static struct resource dbgu_resources[] = { static struct atmel_uart_data dbgu_data = { .use_dma_tx = 0, .use_dma_rx = 0, + .rts_gpio = -EINVAL, }; static u64 dbgu_dmamask = DMA_BIT_MASK(32); @@ -1626,6 +1627,7 @@ static struct resource uart0_resources[] = { static struct atmel_uart_data uart0_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart0_dmamask = DMA_BIT_MASK(32); @@ -1669,6 +1671,7 @@ static struct resource uart1_resources[] = { static struct atmel_uart_data uart1_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart1_dmamask = DMA_BIT_MASK(32); @@ -1712,6 +1715,7 @@ static struct resource uart2_resources[] = { static struct atmel_uart_data uart2_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart2_dmamask = DMA_BIT_MASK(32); @@ -1755,6 +1759,7 @@ static struct resource uart3_resources[] = { static struct atmel_uart_data uart3_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart3_dmamask = DMA_BIT_MASK(32); diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c index 6cf441cadf94..3c2462b15b8b 100644 --- a/arch/arm/mach-at91/at91sam9rl_devices.c +++ b/arch/arm/mach-at91/at91sam9rl_devices.c @@ -957,6 +957,7 @@ static struct resource dbgu_resources[] = { static struct atmel_uart_data dbgu_data = { .use_dma_tx = 0, .use_dma_rx = 0, /* DBGU not capable of receive DMA */ + .rts_gpio = -EINVAL, }; static u64 dbgu_dmamask = DMA_BIT_MASK(32); @@ -995,6 +996,7 @@ static struct resource uart0_resources[] = { static struct atmel_uart_data uart0_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart0_dmamask = DMA_BIT_MASK(32); @@ -1046,6 +1048,7 @@ static struct resource uart1_resources[] = { static struct atmel_uart_data uart1_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart1_dmamask = DMA_BIT_MASK(32); @@ -1089,6 +1092,7 @@ static struct resource uart2_resources[] = { static struct atmel_uart_data uart2_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart2_dmamask = DMA_BIT_MASK(32); @@ -1132,6 +1136,7 @@ static struct resource uart3_resources[] = { static struct atmel_uart_data uart3_data = { .use_dma_tx = 1, .use_dma_rx = 1, + .rts_gpio = -EINVAL, }; static u64 uart3_dmamask = DMA_BIT_MASK(32); diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c index d067285a2d20..507297124731 100644 --- a/drivers/tty/serial/atmel_serial.c +++ b/drivers/tty/serial/atmel_serial.c @@ -35,21 +35,18 @@ #include #include #include +#include #include #include #include #include #include #include +#include #include #include -#ifdef CONFIG_ARM -#include -#include -#endif - #define PDC_BUFFER_SIZE 512 /* Revisit: We should calculate this based on the actual port settings */ #define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */ @@ -167,6 +164,7 @@ struct atmel_uart_port { struct circ_buf rx_ring; struct serial_rs485 rs485; /* rs485 settings */ + int rts_gpio; /* optional RTS GPIO */ unsigned int tx_done_mask; bool is_usart; /* usart or uart */ struct timer_list uart_timer; /* uart timer */ @@ -300,20 +298,16 @@ static void atmel_set_mctrl(struct uart_port *port, u_int mctrl) unsigned int mode; struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); -#ifdef CONFIG_ARCH_AT91RM9200 - if (cpu_is_at91rm9200()) { - /* - * AT91RM9200 Errata #39: RTS0 is not internally connected - * to PA21. We need to drive the pin manually. - */ - if (port->mapbase == AT91RM9200_BASE_US0) { - if (mctrl & TIOCM_RTS) - at91_set_gpio_value(AT91_PIN_PA21, 0); - else - at91_set_gpio_value(AT91_PIN_PA21, 1); - } + /* + * AT91RM9200 Errata #39: RTS0 is not internally connected + * to PA21. We need to drive the pin as a GPIO. + */ + if (gpio_is_valid(atmel_port->rts_gpio)) { + if (mctrl & TIOCM_RTS) + gpio_set_value(atmel_port->rts_gpio, 0); + else + gpio_set_value(atmel_port->rts_gpio, 1); } -#endif if (mctrl & TIOCM_RTS) control |= ATMEL_US_RTSEN; @@ -2365,6 +2359,31 @@ static int atmel_serial_probe(struct platform_device *pdev) port = &atmel_ports[ret]; port->backup_imr = 0; port->uart.line = ret; + port->rts_gpio = -EINVAL; /* Invalid, zero could be valid */ + /* + * In theory the GPIO pin controlling RTS could be zero and + * this would be an improper check, but we know that the only + * existing case is != 0 and it's nice to use the zero-initialized + * structs to indicate "no RTS GPIO" instead of open-coding some + * invalid value everywhere. + */ + if (pdata && gpio_is_valid(pdata->rts_gpio)) + port->rts_gpio = pdata->rts_gpio; + else if (np) + port->rts_gpio = of_get_named_gpio(np, "rts-gpios", 0); + + if (gpio_is_valid(port->rts_gpio)) { + ret = devm_gpio_request(&pdev->dev, port->rts_gpio, "RTS"); + if (ret) { + dev_err(&pdev->dev, "error requesting RTS GPIO\n"); + goto err; + } + ret = gpio_direction_output(port->rts_gpio, 0); + if (ret) { + dev_err(&pdev->dev, "error setting up RTS GPIO\n"); + goto err; + } + } ret = atmel_init_port(port, pdev); if (ret) diff --git a/include/linux/platform_data/atmel.h b/include/linux/platform_data/atmel.h index cea9f70133c5..e26b0c14edea 100644 --- a/include/linux/platform_data/atmel.h +++ b/include/linux/platform_data/atmel.h @@ -84,6 +84,7 @@ struct atmel_uart_data { short use_dma_rx; /* use receive DMA? */ void __iomem *regs; /* virt. base address, if any */ struct serial_rs485 rs485; /* rs485 settings */ + int rts_gpio; /* optional RTS GPIO */ }; /* Touchscreen Controller */