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[77.65.79.196]) by smtp.gmail.com with ESMTPSA id e25sm7260951ljp.97.2020.02.25.00.46.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Feb 2020 00:46:49 -0800 (PST) Date: Tue, 25 Feb 2020 09:46:45 +0100 From: Mateusz Holenko To: Rob Herring , Mark Rutland , Greg Kroah-Hartman , Jiri Slaby , devicetree@vger.kernel.org, linux-serial@vger.kernel.org Cc: Stafford Horne , Karol Gugala , Mateusz Holenko , Mauro Carvalho Chehab , "David S. Miller" , "Paul E. McKenney" , Filip Kokosinski , Pawel Czarnecki , Joel Stanley , Jonathan Cameron , Maxime Ripard , Shawn Guo , Heiko Stuebner , Sam Ravnborg , Icenowy Zheng , Laurent Pinchart , linux-kernel@vger.kernel.org Subject: [PATCH v3 2/5] dt-bindings: soc: document LiteX SoC Controller bindings Message-ID: <20200225094437.4170502-2-mholenko@antmicro.com> References: <20200225094437.4170502-0-mholenko@antmicro.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200225094437.4170502-0-mholenko@antmicro.com> Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Pawel Czarnecki Add documentation for LiteX SoC Controller bindings. Signed-off-by: Pawel Czarnecki Signed-off-by: Mateusz Holenko --- Notes: This commit has been introduced in v3 of the patchset. .../soc/litex/litex,soc_controller.yaml | 46 +++++++++++++++++++ MAINTAINERS | 6 +++ 2 files changed, 52 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/litex/litex,soc_controller.yaml diff --git a/Documentation/devicetree/bindings/soc/litex/litex,soc_controller.yaml b/Documentation/devicetree/bindings/soc/litex/litex,soc_controller.yaml new file mode 100644 index 000000000000..039894265319 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/litex/litex,soc_controller.yaml @@ -0,0 +1,46 @@ +PDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/litex/litex,soc_controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LiteX SoC Controller driver + +description: | + This is the SoC Controller driver for the LiteX SoC Builder. + It's purpose is to verify LiteX CSR (Control&Status Register) access + operations and provide function for other drivers to read/write CSRs + and to check if those accessors are ready to use. + +maintainers: + - Karol Gugala + - Mateusz Holenko + +properties: + compatible: + const: litex,soc_controller + + reg: + description: Base address and length of the register space + + status: + description: | + disables or enables node + + const: "okay" + +required: + - compatible + - reg + - status + +examples: + - | + + soc_ctrl0: soc_controller@f0000000 { + compatible = "litex,soc_controller"; + reg = <0x0 0xf0000000 0x0 0xC>; + status = "okay"; + }; + +... diff --git a/MAINTAINERS b/MAINTAINERS index 4beb8dc4c7eb..ec925c081dd2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -9725,6 +9725,12 @@ L: kunit-dev@googlegroups.com S: Maintained F: lib/list-test.c +LITEX PLATFORM +M: Karol Gugala +M: Mateusz Holenko +S: Maintained +F: Documentation/devicetree/bindings/*/litex,*.yaml + LIVE PATCHING M: Josh Poimboeuf M: Jiri Kosina