@@ -106,7 +106,7 @@ struct gdma_dma_desc {
struct gdma_dmaengine_chan {
struct virt_dma_chan vchan;
unsigned int id;
- unsigned int slave_id;
+ unsigned int req;
dma_addr_t fifo_addr;
enum gdma_dma_transfer_size burst_size;
@@ -194,7 +194,6 @@ static int gdma_dma_config(struct dma_chan *c,
dev_err(dma_dev->ddev.dev, "only support 4 byte buswidth\n");
return -EINVAL;
}
- chan->slave_id = config->slave_id;
chan->fifo_addr = config->dst_addr;
chan->burst_size = gdma_dma_maxburst(config->dst_maxburst);
break;
@@ -203,7 +202,6 @@ static int gdma_dma_config(struct dma_chan *c,
dev_err(dma_dev->ddev.dev, "only support 4 byte buswidth\n");
return -EINVAL;
}
- chan->slave_id = config->slave_id;
chan->fifo_addr = config->src_addr;
chan->burst_size = gdma_dma_maxburst(config->src_maxburst);
break;
@@ -288,12 +286,12 @@ static int rt305x_gdma_start_transfer(struct gdma_dmaengine_chan *chan)
dst_addr = chan->fifo_addr;
ctrl0 = GDMA_REG_CTRL0_DST_ADDR_FIXED |
(8 << GDMA_RT305X_CTRL0_SRC_REQ_SHIFT) |
- (chan->slave_id << GDMA_RT305X_CTRL0_DST_REQ_SHIFT);
+ (chan->req << GDMA_RT305X_CTRL0_DST_REQ_SHIFT);
} else if (chan->desc->direction == DMA_DEV_TO_MEM) {
src_addr = chan->fifo_addr;
dst_addr = sg->dst_addr;
ctrl0 = GDMA_REG_CTRL0_SRC_ADDR_FIXED |
- (chan->slave_id << GDMA_RT305X_CTRL0_SRC_REQ_SHIFT) |
+ (chan->req << GDMA_RT305X_CTRL0_SRC_REQ_SHIFT) |
(8 << GDMA_RT305X_CTRL0_DST_REQ_SHIFT);
} else if (chan->desc->direction == DMA_MEM_TO_MEM) {
/*
@@ -365,12 +363,12 @@ static int rt3883_gdma_start_transfer(struct gdma_dmaengine_chan *chan)
dst_addr = chan->fifo_addr;
ctrl0 = GDMA_REG_CTRL0_DST_ADDR_FIXED;
ctrl1 = (32 << GDMA_REG_CTRL1_SRC_REQ_SHIFT) |
- (chan->slave_id << GDMA_REG_CTRL1_DST_REQ_SHIFT);
+ (chan->req << GDMA_REG_CTRL1_DST_REQ_SHIFT);
} else if (chan->desc->direction == DMA_DEV_TO_MEM) {
src_addr = chan->fifo_addr;
dst_addr = sg->dst_addr;
ctrl0 = GDMA_REG_CTRL0_SRC_ADDR_FIXED;
- ctrl1 = (chan->slave_id << GDMA_REG_CTRL1_SRC_REQ_SHIFT) |
+ ctrl1 = (chan->req << GDMA_REG_CTRL1_SRC_REQ_SHIFT) |
(32 << GDMA_REG_CTRL1_DST_REQ_SHIFT) |
GDMA_REG_CTRL1_COHERENT;
} else if (chan->desc->direction == DMA_MEM_TO_MEM) {