From patchwork Fri Feb 11 19:12:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 542050 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA979C433F5 for ; Fri, 11 Feb 2022 19:12:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345845AbiBKTMy (ORCPT ); Fri, 11 Feb 2022 14:12:54 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:39644 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345686AbiBKTMu (ORCPT ); Fri, 11 Feb 2022 14:12:50 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D566238F; Fri, 11 Feb 2022 11:12:48 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 715E561F39; Fri, 11 Feb 2022 19:12:48 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id AAD40C340F2; Fri, 11 Feb 2022 19:12:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1644606767; bh=kaArX3mep8T1juUfVoTJSgqg1e77nuBpM1rAZZLiL5Y=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CGFg1aPBiw7lgHDhG+PiaowWYKoeM663d3ZC/qLhY/OXxHiLBxvuTY/WdqTQDft8L PXtWKCVQVOJ0mee3t/3NtPRN0qgpjhCDOw4nric1R9xjMcZQZX9e2pYxsvme0Fm+FR JxOtbqft01eG3Kli5M28K7xMZ9BBv2kBphPQ997hSpYQFK7w1yAQML2dSZbwydHApR Ymz6s9g/Dldlfsa7HC60qqjCvaJmRxhQF4uHEdDGH+ldD8e8vSfTc58J6uxoC9cAWv ZBWTdyzF05/lXrDzmRLsTJZ5pb6jVOooWIaxT2r68RsE0RLKZvmNmiBNilMurVbu62 uoRHZiCTu/yAg== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Stephen Boyd , Michael Turquette , Greg Kroah-Hartman , Gregory Clement Cc: =?utf-8?q?Pali_Roh=C3=A1r?= , linux-clk@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Rob Herring , =?utf-8?q?Mare?= =?utf-8?q?k_Beh=C3=BAn?= Subject: [PATCH v8 2/6] dt-bindings: mvebu-uart: document DT bindings for marvell,armada-3700-uart-clock Date: Fri, 11 Feb 2022 20:12:34 +0100 Message-Id: <20220211191238.2142-3-kabel@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220211191238.2142-1-kabel@kernel.org> References: <20220211191238.2142-1-kabel@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Pali Rohár Add DT bindings documentation for device nodes with compatible string "marvell,armada-3700-uart-clock". Signed-off-by: Pali Rohár Reviewed-by: Rob Herring Reviewed-by: Marek Behún Signed-off-by: Marek Behún --- Changes since v7: - added Reviewed-by tags - changed commit message a little ("This change adds" -> "Add") - fixed lint errors in yaml binding file --- .../clock/marvell,armada-3700-uart-clock.yaml | 59 +++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/marvell,armada-3700-uart-clock.yaml diff --git a/Documentation/devicetree/bindings/clock/marvell,armada-3700-uart-clock.yaml b/Documentation/devicetree/bindings/clock/marvell,armada-3700-uart-clock.yaml new file mode 100644 index 000000000000..175f5c8f2bc5 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/marvell,armada-3700-uart-clock.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/marvell,armada-3700-uart-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# +title: Marvell Armada 3720 UART clocks + +maintainers: + - Pali Rohár + +properties: + compatible: + const: marvell,armada-3700-uart-clock + + reg: + items: + - description: UART Clock Control Register + - description: UART 2 Baud Rate Divisor Register + + clocks: + description: | + List of parent clocks suitable for UART from following set: + "TBG-A-P", "TBG-B-P", "TBG-A-S", "TBG-B-S", "xtal" + UART clock can use one from this set and when more are provided + then kernel would choose and configure the most suitable one. + It is suggest to specify at least one TBG clock to achieve + baudrates above 230400 and also to specify clock which bootloader + used for UART (most probably xtal) for smooth boot log on UART. + + clock-names: + items: + - const: TBG-A-P + - const: TBG-B-P + - const: TBG-A-S + - const: TBG-B-S + - const: xtal + minItems: 1 + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - '#clock-cells' + +additionalProperties: false + +examples: + - | + uartclk: clock-controller@12010 { + compatible = "marvell,armada-3700-uart-clock"; + reg = <0x12010 0x4>, <0x12210 0x4>; + clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>, <&tbg 3>, <&xtalclk>; + clock-names = "TBG-A-P", "TBG-B-P", "TBG-A-S", "TBG-B-S", "xtal"; + #clock-cells = <1>; + };