From patchwork Fri Apr 22 18:06:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 565989 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 32DC0C433FE for ; Fri, 22 Apr 2022 18:10:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233446AbiDVSNm (ORCPT ); Fri, 22 Apr 2022 14:13:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44802 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234779AbiDVSKE (ORCPT ); Fri, 22 Apr 2022 14:10:04 -0400 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [217.70.178.231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5EC3815B46C; Fri, 22 Apr 2022 11:07:10 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id C5A51100008; Fri, 22 Apr 2022 18:06:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1650650796; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=InYlcnp2sDm4ChkUXG4xyc4b9OP+smT4t/tQR4FHwzw=; b=krxB/j1VLxHYflaeOYpxgSRpNiHJQuzzRMPvW9G3vmAIXiI/kFL0esitjydF+WMV4EzJye fyCRh+hiS47pns/xwZHQ9tzsSOMZrsbfmyTa0uCVuDfYQWR6VO3OH5b1WNrnjOIZrpYC7C fHazs+P2lwCwiMnAZMngU4qLGVMAfI5nPRlQQ2CQPEKY9loQWmWUJDWkRBSlsKl1eBTTgw 0Rs/3HlgUZX08hhoW8hQp3yn+ls097RcRGt9KhQoosEZ15eVrNT0TTvGDdoJQej0fwHrSu ZSD7Ryh7x2KmZ7t0lfX3MNWfPD890BisxRSj0+LHqhyAH5IqORdG4h6xkpJ32g== From: Miquel Raynal To: Geert Uytterhoeven , Magnus Damm , Greg Kroah-Hartman , Jiri Slaby Cc: Miquel Raynal , Andy Shevchenko , linux-renesas-soc@vger.kernel.org, linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Ilpo Jarvinen , Phil Edworthy Subject: [PATCH v7 9/9] serial: 8250: dw: Improve RZN1 support Date: Fri, 22 Apr 2022 20:06:15 +0200 Message-Id: <20220422180615.9098-10-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220422180615.9098-1-miquel.raynal@bootlin.com> References: <20220422180615.9098-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Phil Edworthy Renesas RZ/N1 SoC features a slightly modified DW UART. On this SoC, the CPR register value is known but not synthetized in hardware. We hence need to provide a CPR value in the platform data. This version of the controller also relies on acting as flow controller when using DMA, so we need to provide the "is dma flow controller" quirk. Signed-off-by: Phil Edworthy Co-developed-by: Miquel Raynal Signed-off-by: Miquel Raynal Reviewed-by: Andy Shevchenko --- drivers/tty/serial/8250/8250_dw.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index 90e64c8bd4bf..0cf1a99dc124 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -761,6 +761,8 @@ static const struct dw8250_platform_data dw8250_armada_38x_data = { static const struct dw8250_platform_data dw8250_renesas_rzn1_data = { .usr_reg = DW_UART_USR, + .cpr_val = 0x00012f32, + .quirks = DW_UART_QUIRK_IS_DMA_FC, }; static const struct dw8250_platform_data dw8250_starfive_jh7100_data = {