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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-71def651fb2sm1888288a34.27.2024.12.11.12.54.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2024 12:54:52 -0800 (PST) From: David Lechner Subject: [PATCH v6 00/17] spi: axi-spi-engine: add offload support Date: Wed, 11 Dec 2024 14:54:37 -0600 Message-Id: <20241211-dlech-mainline-spi-engine-offload-2-v6-0-88ee574d5d03@baylibre.com> Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAA38WWcC/5XRzWrDMAwA4FcJPs/Dkf972nuMHWRbbg1p0iVZa Cl997kptDB66C7GMuiTLJ3ZRGOhiW2aMxtpKVMZ+hqYt4bFHfZb4iXVmIEAJXQreOoo7vgeS9+ Vnvh0KJz67fU65NwNmDhwzJGk9SJoDKxKh5FyOa5VPr9qvCvTPIyntegC19f/+QtwwZ0VFusRl dQfAU9dCSO9x2HPriUW+WAtwGusrKxVIEjplI0PT1h1Z1sB8jVWVTa7FnTwPmtsn7D6wbatfo3 VlQ2ErtUhacK/Q7jcBj/S90/d6nybPjvgXOWSNo0lk6QJOYIB0gZisCppUORNCkYZr4RREsy6w HtWckZR9tmhlUI6gKRF0k6gpxCSS1Ko6BDXrIAT8drLvsybpqfjzNcPQitqd5df5Lt1YXsCAAA = X-Change-ID: 20240510-dlech-mainline-spi-engine-offload-2-afce3790b5ab To: Mark Brown , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , =?utf-8?q?Nuno_S=C3=A1?= Cc: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Michael Hennerich , Lars-Peter Clausen , David Jander , Martin Sperl , linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, linux-pwm@vger.kernel.org, Jonathan Cameron , David Lechner , Axel Haslam X-Mailer: b4 0.14.2 Not much to say for this revision. The main changes were making the trigger-sources/#trigger-source-cells properties more generic, splitting up the spi-offload.h header into consumer/provider/types.h and adding a DAC driver patch to make use of the TX DMA stream API. If we think this is good enough to go in, the SPI patches should be applying fine since this is based on a recent linux-next. But the IIO patches will need some care. There are dependencies on both the iio/fixes-togreg and the iio/testing branches as well as a couple of patches that haven't been applied yet because they are waiting for other dependencies [1]. So best would be to let Mark pick up the SPI stuff and create an immutable branch and let Jonathan work out the IIO stuff. [1]: https://lore.kernel.org/all/20241124125206.1ffd6e6c@jic23-huawei/ --- Changes in v6: - Dropped the "spi: dt-bindings: add trigger-source.yaml" patch. It was reworked and merged into dt-schema in https://github.com/devicetree-org/dt-schema/pull/147 - Adjusted other dt-bindings patches to account for above change. - Dropped one iio patch that was already applied to iio tree. - Added a DAC patch to make use of the TX DMA stream API. - Minor fixes and improvements to other patches based on feedback. - Link to v5: https://lore.kernel.org/r/20241115-dlech-mainline-spi-engine-offload-2-v5-0-bea815bd5ea5@baylibre.com Changes in v5: - Dropped pwm patch. A variant of this patch has been picked up in the pwm tree. - Addressed review comments (see details in individual patches). - Added some polish, like MAINTAINERS entries and updating ADC docs. - Link to v4: https://lore.kernel.org/r/20241023-dlech-mainline-spi-engine-offload-2-v4-0-f8125b99f5a1@baylibre.com Changes in v4: - Dropped #spi-offload-cells and spi-offload properties from DT bindings. - Made an attempt at a more generic trigger interface instead of using clk framework. This also includes a new driver for a generic PWM trigger. - Addressed IIO review comments. - Added new patches for iio/adc/ad4695 as 2nd user of SPI offload. - Link to v3: https://lore.kernel.org/r/20240722-dlech-mainline-spi-engine-offload-2-v3-0-7420e45df69b@baylibre.com Changes in v3: - Reworked DT bindings to have things physically connected to the SPI controller be properties of the SPI controller and use more conventional provider/consumer properties. - Added more SPI APIs for peripheral drivers to use to get auxillary offload resources, like triggers. - Link to v2: https://lore.kernel.org/r/20240510-dlech-mainline-spi-engine-offload-2-v2-0-8707a870c435@baylibre.com Individual patches have more details on these changes and earlier revisions too. --- As a recap, here is the background and end goal of this series: The AXI SPI Engine is a SPI controller that has the ability to record a series of SPI transactions and then play them back using a hardware trigger. This allows operations to be performed, repeating many times, without any CPU intervention. This is needed for achieving high data rates (millions of samples per second) from ADCs and DACs that are connected via a SPI bus. The offload hardware interface consists of a trigger input and a data output for the RX data. These are connected to other hardware external to the SPI controller. To record one or more transactions, commands and TX data are written to memories in the controller (RX buffer is not used since RX data gets streamed to an external sink). This sequence of transactions can then be played back when the trigger input is asserted. This series includes core SPI support along with the first SPI controller (AXI SPI Engine) and SPI peripheral (AD7944 ADC) that use them. This enables capturing analog data at 2 million samples per second. The hardware setup looks like this: +-------------------------------+ +------------------+ | | | | | SOC/FPGA | | AD7944 ADC | | +---------------------+ | | | | | AXI SPI Engine | | | | | | SPI Bus ============ SPI Bus | | | | | | | | | +---------------+ | | | | | | | Offload 0 | | | +------------------+ | | | RX DATA OUT > > > > | | | | TRIGGER IN < < < v | | | +---------------+ | ^ v | | +---------------------+ ^ v | | | AXI PWM | ^ v | | | CH0 > ^ v | | +---------------------+ v | | | AXI DMA | v | | | CH0 < < < | | +---------------------+ | | | +-------------------------------+ --- Axel Haslam (1): iio: dac: ad5791: Add offload support David Lechner (16): spi: add basic support for SPI offloading spi: offload: add support for hardware triggers dt-bindings: trigger-source: add generic PWM trigger source spi: offload-trigger: add PWM trigger driver spi: add offload TX/RX streaming APIs spi: dt-bindings: axi-spi-engine: add SPI offload properties spi: axi-spi-engine: implement offload support iio: buffer-dmaengine: split requesting DMA channel from allocating buffer iio: buffer-dmaengine: add devm_iio_dmaengine_buffer_setup_with_handle() iio: adc: ad7944: don't use storagebits for sizing iio: adc: ad7944: add support for SPI offload doc: iio: ad7944: describe offload support dt-bindings: iio: adc: adi,ad4695: add SPI offload properties iio: adc: ad4695: Add support for SPI offload doc: iio: ad4695: add SPI offload support iio: dac: ad5791: sort include directives .../devicetree/bindings/iio/adc/adi,ad4695.yaml | 13 + .../bindings/spi/adi,axi-spi-engine.yaml | 24 ++ .../bindings/trigger-source/pwm-trigger.yaml | 37 ++ Documentation/iio/ad4695.rst | 68 +++ Documentation/iio/ad7944.rst | 24 +- MAINTAINERS | 12 + drivers/iio/adc/Kconfig | 2 + drivers/iio/adc/ad4695.c | 445 +++++++++++++++++++- drivers/iio/adc/ad7944.c | 307 +++++++++++++- drivers/iio/adc/adi-axi-adc.c | 2 +- drivers/iio/buffer/industrialio-buffer-dmaengine.c | 144 +++++-- drivers/iio/dac/Kconfig | 3 + drivers/iio/dac/ad5791.c | 166 +++++++- drivers/iio/dac/adi-axi-dac.c | 2 +- drivers/spi/Kconfig | 16 + drivers/spi/Makefile | 4 + drivers/spi/spi-axi-spi-engine.c | 314 +++++++++++++- drivers/spi/spi-offload-trigger-pwm.c | 162 +++++++ drivers/spi/spi-offload.c | 465 +++++++++++++++++++++ drivers/spi/spi.c | 10 + include/dt-bindings/iio/adc/adi,ad4695.h | 7 + include/linux/iio/buffer-dmaengine.h | 7 +- include/linux/spi/offload/consumer.h | 39 ++ include/linux/spi/offload/provider.h | 47 +++ include/linux/spi/offload/types.h | 99 +++++ include/linux/spi/spi.h | 20 + 26 files changed, 2336 insertions(+), 103 deletions(-) --- base-commit: 8ca8e57217e8263bc6dda6b77ef6c9051c2b6241 change-id: 20240510-dlech-mainline-spi-engine-offload-2-afce3790b5ab prerequisite-patch-id: 7e6d36bfc262e562cb74d524e96db64694064326 prerequisite-patch-id: d864ef9f8a7303822d50d580a9ebbd8d304c8aa6 Best regards,