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Show patches with
: Submitter =
Xu Yilun
| 8 patches
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andy.doan@linaro.org
andy.doan@linaro.org
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Series
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Date
Submitter
Delegate
State
[v3] spi: fix the divide by 0 error when calculating xfer waiting time
[v3] spi: fix the divide by 0 error when calculating xfer waiting time
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2021-01-04
Xu Yilun
Accepted
[2/2] spi: fix the divide by 0 error when calculating xfer waiting time
fix the issue when xfer by spi-altera
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-
-
2020-12-29
Xu Yilun
New
[2/2] spi: altera: fix module autoload
Untitled series #39385
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-
-
2020-06-24
Xu Yilun
Accepted
[RESEND,v2,2/3] spi: altera: support indirect access to the registers
add regmap & indirect access support
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-
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2020-06-19
Xu Yilun
Superseded
[v2,5/6] spi: altera: support indirect access to the registers
add regmap & indirect access support
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-
-
2020-06-18
Xu Yilun
Accepted
[5/6] spi: altera: move driver name string to header file
Add more configuration and regmap support for spi-altera
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-
-
2020-06-11
Xu Yilun
New
[3/6] spi: altera: add platform data for slave information.
Add more configuration and regmap support for spi-altera
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-
2020-06-11
Xu Yilun
Accepted
[2/6] spi: altera: add SPI core parameters support via platform data.
Add more configuration and regmap support for spi-altera
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-
-
2020-06-11
Xu Yilun
Accepted