From patchwork Wed Nov 9 10:39:06 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 4970 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 4F81F23E13 for ; Wed, 9 Nov 2011 10:39:32 +0000 (UTC) Received: from mail-fx0-f52.google.com (mail-fx0-f52.google.com [209.85.161.52]) by fiordland.canonical.com (Postfix) with ESMTP id 45125A180D5 for ; Wed, 9 Nov 2011 10:39:32 +0000 (UTC) Received: by mail-fx0-f52.google.com with SMTP id n26so2131830faa.11 for ; Wed, 09 Nov 2011 02:39:32 -0800 (PST) Received: by 10.152.148.165 with SMTP id tt5mr1110482lab.23.1320835172113; Wed, 09 Nov 2011 02:39:32 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.152.10.72 with SMTP id g8cs163015lab; Wed, 9 Nov 2011 02:39:31 -0800 (PST) Received: by 10.14.15.221 with SMTP id f69mr129420eef.163.1320835170160; Wed, 09 Nov 2011 02:39:30 -0800 (PST) Received: from eu1sys200aog113.obsmtp.com (eu1sys200aog113.obsmtp.com. [207.126.144.135]) by mx.google.com with SMTP id q28si1086147eea.48.2011.11.09.02.39.21 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 09 Nov 2011 02:39:30 -0800 (PST) Received-SPF: neutral (google.com: 207.126.144.135 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) client-ip=207.126.144.135; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.135 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) smtp.mail=linus.walleij@stericsson.com Received: from beta.dmz-eu.st.com ([164.129.1.35]) (using TLSv1) by eu1sys200aob113.postini.com ([207.126.147.11]) with SMTP ID DSNKTrpYWWn3e6vIBtTKyHJRfkFwJJmGZe/l@postini.com; Wed, 09 Nov 2011 10:39:30 UTC Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 4DAF6F7; Wed, 9 Nov 2011 10:39:09 +0000 (GMT) Received: from relay2.stm.gmessaging.net (unknown [10.230.100.18]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 949E22B3E; Wed, 9 Nov 2011 10:39:09 +0000 (GMT) Received: from exdcvycastm003.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm003", Issuer "exdcvycastm003" (not verified)) by relay2.stm.gmessaging.net (Postfix) with ESMTPS id 31A29A807D; Wed, 9 Nov 2011 11:39:05 +0100 (CET) Received: from localhost.localdomain (10.230.100.153) by smtp.stericsson.com (10.230.100.1) with Microsoft SMTP Server (TLS) id 8.3.83.0; Wed, 9 Nov 2011 11:39:08 +0100 From: Linus Walleij To: Grant Likely , Cc: , Viresh Kumar , Virupax Sadashivpetimath , Linus Walleij Subject: [PATCH 3/6] spi/pl022: disable the PL022 block when unused Date: Wed, 9 Nov 2011 11:39:06 +0100 Message-ID: <1320835146-31268-1-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.3.2 MIME-Version: 1.0 From: Virupax Sadashivpetimath Make sure we clear the enable bit when the block is not used. This will save some energy in certain hardware versions. Signed-off-by: Virupax Sadashivpetimath Signed-off-by: Linus Walleij --- drivers/spi/spi-pl022.c | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c index 305f2ba..fa3eaae 100644 --- a/drivers/spi/spi-pl022.c +++ b/drivers/spi/spi-pl022.c @@ -512,6 +512,11 @@ static void giveback(struct pl022 *pl022) msg->state = NULL; if (msg->complete) msg->complete(msg->context); + + /* disable the SPI/SSP operation */ + writew((readw(SSP_CR1(pl022->virtbase)) & + (~SSP_CR1_MASK_SSE)), SSP_CR1(pl022->virtbase)); + /* This message is completed, so let's turn off the clocks & power */ pm_runtime_put(&pl022->adev->dev); }