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Wed, 24 Apr 2024 05:13:34 +0000 Received: from ZQ4PR01MB1154.CHNPR01.prod.partner.outlook.cn ([fe80::301e:ec80:4356:8b14]) by ZQ4PR01MB1154.CHNPR01.prod.partner.outlook.cn ([fe80::301e:ec80:4356:8b14%6]) with mapi id 15.20.7472.044; Wed, 24 Apr 2024 05:13:34 +0000 From: Ji Sheng Teoh To: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Michal Simek Cc: Ji Sheng Teoh , Ley Foon Tan , linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Eng Lee Teh Subject: [PATCH v1 1/2] spi: spi-cadence: Add optional reset control support Date: Wed, 24 Apr 2024 13:13:16 +0800 Message-ID: <20240424051317.2084059-2-jisheng.teoh@starfivetech.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240424051317.2084059-1-jisheng.teoh@starfivetech.com> References: <20240424051317.2084059-1-jisheng.teoh@starfivetech.com> X-ClientProxiedBy: NT0PR01CA0024.CHNPR01.prod.partner.outlook.cn (2406:e500:c510:c::8) To ZQ4PR01MB1154.CHNPR01.prod.partner.outlook.cn (2406:e500:c550:17::9) Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: ZQ4PR01MB1154:EE_|ZQ4PR01MB1268:EE_ X-MS-Office365-Filtering-Correlation-Id: acc065dd-291b-4286-10c4-08dc641d4a6c X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Eng Lee Teh Signed-off-by: Ley Foon Tan Signed-off-by: Ji Sheng Teoh --- drivers/spi/spi-cadence.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/spi/spi-cadence.c b/drivers/spi/spi-cadence.c index e5140532071d..41f2f51d39e4 100644 --- a/drivers/spi/spi-cadence.c +++ b/drivers/spi/spi-cadence.c @@ -111,6 +111,7 @@ * @dev_busy: Device busy flag * @is_decoded_cs: Flag for decoder property set or not * @tx_fifo_depth: Depth of the TX FIFO + * @rstc: Optional reset control for SPI controller */ struct cdns_spi { void __iomem *regs; @@ -125,6 +126,7 @@ struct cdns_spi { u8 dev_busy; u32 is_decoded_cs; unsigned int tx_fifo_depth; + struct reset_control *rstc; }; /* Macros for the SPI controller read/write */ @@ -588,6 +590,16 @@ static int cdns_spi_probe(struct platform_device *pdev) goto remove_ctlr; } + xspi->rstc = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL); + if (IS_ERR(xspi->rstc)) { + ret = PTR_ERR(xspi->rstc); + dev_err(&pdev->dev, "Cannot get SPI reset.\n"); + goto remove_ctlr; + } + + reset_control_assert(xspi->rstc); + reset_control_deassert(xspi->rstc); + if (!spi_controller_is_target(ctlr)) { xspi->ref_clk = devm_clk_get_enabled(&pdev->dev, "ref_clk"); if (IS_ERR(xspi->ref_clk)) {