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[3/3] spi: spi-microchip-core: Fix the number of chip selects supported

Message ID 20240502143410.12629-4-prajna.rajendrakumar@microchip.com
State Accepted
Commit a7ed3a11202d90939a3d00ffcc8cf50703cb7b35
Headers show
Series Add support for GPIO based CS | expand

Commit Message

Prajna Rajendra Kumar May 2, 2024, 2:34 p.m. UTC
The SPI controller in PolarFire SoC has multiple chip selects, but only
one is wired up in the MSS. Therefore, fix the driver to chose one
chip select.

Fixes: 9ac8d17694b6 ("spi: add support for microchip fpga spi controllers")
Signed-off-by: Prajna Rajendra Kumar <prajna.rajendrakumar@microchip.com>
---
 drivers/spi/spi-microchip-core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Conor Dooley May 2, 2024, 3:47 p.m. UTC | #1
On Thu, May 02, 2024 at 03:34:10PM +0100, Prajna Rajendra Kumar wrote:
> The SPI controller in PolarFire SoC has multiple chip selects, but only
> one is wired up in the MSS. Therefore, fix the driver to chose one
> chip select.

Given Krzysztof's comments on the binding "only one is wired up in the
MSS" probably means nothing to anyone other than us, and we should
rephrase this so that we explain what this actually means.
The actual change is fine to me though, since I do understand what's
being said here. With a revised commit message:
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

Cheers,
Conor.

> 
> Fixes: 9ac8d17694b6 ("spi: add support for microchip fpga spi controllers")
> Signed-off-by: Prajna Rajendra Kumar <prajna.rajendrakumar@microchip.com>
> ---
>  drivers/spi/spi-microchip-core.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/spi/spi-microchip-core.c b/drivers/spi/spi-microchip-core.c
> index 71886c27bca3..4289dfba9af5 100644
> --- a/drivers/spi/spi-microchip-core.c
> +++ b/drivers/spi/spi-microchip-core.c
> @@ -21,7 +21,7 @@
>  #include <linux/spi/spi.h>
>  
>  #define MAX_LEN				(0xffff)
> -#define MAX_CS				(8)
> +#define MAX_CS				(1)
>  #define DEFAULT_FRAMESIZE		(8)
>  #define FIFO_DEPTH			(32)
>  #define CLK_GEN_MODE1_MAX		(255)
> -- 
> 2.25.1
> 
>
diff mbox series

Patch

diff --git a/drivers/spi/spi-microchip-core.c b/drivers/spi/spi-microchip-core.c
index 71886c27bca3..4289dfba9af5 100644
--- a/drivers/spi/spi-microchip-core.c
+++ b/drivers/spi/spi-microchip-core.c
@@ -21,7 +21,7 @@ 
 #include <linux/spi/spi.h>
 
 #define MAX_LEN				(0xffff)
-#define MAX_CS				(8)
+#define MAX_CS				(1)
 #define DEFAULT_FRAMESIZE		(8)
 #define FIFO_DEPTH			(32)
 #define CLK_GEN_MODE1_MAX		(255)