From patchwork Mon Mar 5 01:40:14 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jingoo Han X-Patchwork-Id: 7083 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 8836C23E2F for ; Mon, 5 Mar 2012 01:40:18 +0000 (UTC) Received: from mail-iy0-f180.google.com (mail-iy0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id 45152A1805E for ; Mon, 5 Mar 2012 01:40:18 +0000 (UTC) Received: by iage36 with SMTP id e36so6661385iag.11 for ; Sun, 04 Mar 2012 17:40:17 -0800 (PST) Received: from mr.google.com ([10.50.42.132]) by 10.50.42.132 with SMTP id o4mr5043179igl.58.1330911617741 (num_hops = 1); Sun, 04 Mar 2012 17:40:17 -0800 (PST) Received: by 10.50.42.132 with SMTP id o4mr4208828igl.58.1330911617689; Sun, 04 Mar 2012 17:40:17 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.53.18 with SMTP id k18csp14435ibg; Sun, 4 Mar 2012 17:40:16 -0800 (PST) Received: by 10.68.190.8 with SMTP id gm8mr36337181pbc.146.1330911616279; Sun, 04 Mar 2012 17:40:16 -0800 (PST) Received: from mailout1.samsung.com (mailout1.samsung.com. [203.254.224.24]) by mx.google.com with ESMTP id c10si17956780pbd.116.2012.03.04.17.40.15; Sun, 04 Mar 2012 17:40:16 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of jg1.han@samsung.com designates 203.254.224.24 as permitted sender) client-ip=203.254.224.24; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of jg1.han@samsung.com designates 203.254.224.24 as permitted sender) smtp.mail=jg1.han@samsung.com Received: from epcpsbgm1.samsung.com (mailout1.samsung.com [203.254.224.24]) by mailout1.samsung.com (Oracle Communications Messaging Exchange Server 7u4-19.01 64bit (built Sep 7 2010)) with ESMTP id <0M0E002W51YMKHE0@mailout1.samsung.com>; Mon, 05 Mar 2012 10:40:14 +0900 (KST) X-AuditID: cbfee61a-b7b78ae000001ceb-82-4f54197eb21f Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (MMPCPMTA) with SMTP id 8F.81.07403.E79145F4; Mon, 05 Mar 2012 10:40:14 +0900 (KST) Received: from DOJG1HAN02 ([12.23.119.56]) by mmp1.samsung.com (Oracle Communications Messaging Exchange Server 7u4-19.01 64bit (built Sep 7 2010)) with ESMTPA id <0M0E00ID11Z2RW00@mmp1.samsung.com>; Mon, 05 Mar 2012 10:40:14 +0900 (KST) From: Jingoo Han To: linux-usb@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: 'Greg Kroah-Hartman' , 'Kukjin Kim' , linux-arm-kernel@lists.infradead.org, 'Sangwook Lee' , 'Alan Stern' , 'Joonyoung Shim' , patches@linaro.org, linaro-dev@lists.linaro.org, 'Thomas Abraham' , 'Jingoo Han' Subject: [PATCH v3] USB: ehci-s5p: add DMA burst support Date: Mon, 05 Mar 2012 10:40:14 +0900 Message-id: <006101ccfa70$e94e5d90$bbeb18b0$%han@samsung.com> MIME-version: 1.0 Content-type: text/plain; charset=us-ascii Content-transfer-encoding: 7bit X-Mailer: Microsoft Office Outlook 12.0 Content-language: ko Thread-index: Acz6cOkUzLI5DX9XTwOBqtWuBbCOzQ== X-Brightmail-Tracker: AAAAAA== X-Gm-Message-State: ALoCoQnPQdQB9Zc3kEqa23jf2jiMVEmoCED/IxZvQy9wxneUOVffRT7RthxzfB2OrgZj8TYrI14L DMA burst support is added to improve performance in EHCI data transfer. The USB EHCI controller on Exynos SoCs can use INCR16, INCR8, and INCR4 mode. These modes of INSNREG00 register should be set in order to enable DMA burst transfer. This feature is also related to AHB spec. Signed-off-by: Jingoo Han Signed-off-by: Sangwook Lee --- v3: move the register definitions to ehci-s5p.c v2: change the definition name from EHCI_ENA_xxx to EHCI_INSNREG00_ENA_xxx. drivers/usb/host/ehci-s5p.c | 15 +++++++++++++++ 1 files changed, 15 insertions(+), 0 deletions(-) diff --git a/drivers/usb/host/ehci-s5p.c b/drivers/usb/host/ehci-s5p.c index 293f741..f098e2a 100644 --- a/drivers/usb/host/ehci-s5p.c +++ b/drivers/usb/host/ehci-s5p.c @@ -17,6 +17,15 @@ #include #include +#define EHCI_INSNREG00(base) (base + 0x90) +#define EHCI_INSNREG00_ENA_INCR16 (0x1 << 25) +#define EHCI_INSNREG00_ENA_INCR8 (0x1 << 24) +#define EHCI_INSNREG00_ENA_INCR4 (0x1 << 23) +#define EHCI_INSNREG00_ENA_INCRX_ALIGN (0x1 << 22) +#define EHCI_INSNREG00_ENABLE_DMA_BURST \ + (EHCI_INSNREG00_ENA_INCR16 | EHCI_INSNREG00_ENA_INCR8 | \ + EHCI_INSNREG00_ENA_INCR4 | EHCI_INSNREG00_ENA_INCRX_ALIGN) + struct s5p_ehci_hcd { struct device *dev; struct usb_hcd *hcd; @@ -128,6 +137,9 @@ static int __devinit s5p_ehci_probe(struct platform_device *pdev) ehci->regs = hcd->regs + HC_LENGTH(ehci, readl(&ehci->caps->hc_capbase)); + /* DMA burst Enable */ + writel(EHCI_INSNREG00_ENABLE_DMA_BURST, EHCI_INSNREG00(hcd->regs)); + dbg_hcs_params(ehci, "reset"); dbg_hcc_params(ehci, "reset"); @@ -234,6 +246,9 @@ static int s5p_ehci_resume(struct device *dev) if (pdata && pdata->phy_init) pdata->phy_init(pdev, S5P_USB_PHY_HOST); + /* DMA burst Enable */ + writel(EHCI_INSNREG00_ENABLE_DMA_BURST, EHCI_INSNREG00(hcd->regs)); + if (time_before(jiffies, ehci->next_statechange)) msleep(100);