From patchwork Tue Jan 21 14:50:08 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunfeng Yun X-Patchwork-Id: 859117 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8646C1F3FE0; Tue, 21 Jan 2025 14:50:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737471031; cv=none; b=XjP4bL9cVo7yTz5aKE4/MbgqysUoVWSzSdT6XLJyRlnXVnqKQPdEQIblUIVweIZVW0NdIuSddRZjneFpOVfs/Zgj/xyCcLtT55+NAC+EDvGnBa/1r4qDKrDSAB9RnPq1Q+Gqj9RHR9kCQ85P8u9yEWsuq1U1Ow+E1vqD8rKQ8ZE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737471031; c=relaxed/simple; bh=xt99k3R4z3p2cPrkrh4fWb0896DK2DLkRWdGxsZ6vCA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=biTJzJ6z2aJypENIJvr9ohspMewLzHwwKCoSKUYr6DH+yLt3nGhegTANh+wn6vkse9QCYR8BllKa8W+qLloBOPSMMKCeo8zuNvO96B4SbpeGj7vUPP2+rVNNNAgXBu9j4mA719Teqqknsl4qllXfakZiYc/z5GYkAlT2S6vWaRM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=IOjqUoiU; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="IOjqUoiU" X-UUID: 0b320d1cd80711efbd192953cf12861f-20250121 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=PEVqzPvMzV/kLBA1LjNlNLIZXxxvsAFy8f+1eXRMh3I=; b=IOjqUoiU7+ymHvqtF/sXXWTwNdPLvek8L1k17LC/M2WuXar+VZei0QJEE3JWEFvfcOn7m6RD14Gwr/9pvVeFQzFfyAE7Kbf9t+zuIXYBPrJlqOYLuZa4N530A3DUa+MyT0/X1ZSdWks0trh61XXKFDdgUE4rB9Lj5pA3MC+77Ng=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.46, REQID:288b7873-ed14-4198-ad35-049e70e7d1a8, IP:0, U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:60aa074, CLOUDID:f61b6385-0f10-4f52-bb41-91703793d3e4, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102,TC:nil,Content:0|50,EDM:-3 ,IP:nil,URL:11|1,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0 ,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULN X-UUID: 0b320d1cd80711efbd192953cf12861f-20250121 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1618761845; Tue, 21 Jan 2025 22:50:23 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Tue, 21 Jan 2025 22:50:22 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Tue, 21 Jan 2025 22:50:21 +0800 From: Chunfeng Yun To: Greg Kroah-Hartman , Rob Herring , AngeloGioacchino Del Regno CC: Chunfeng Yun , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , Mathias Nyman , , , , , Subject: [PATCH v2 4/4] usb: mtu3: add support remote wakeup of mt8196 Date: Tue, 21 Jan 2025 22:50:08 +0800 Message-ID: <20250121145008.22936-4-chunfeng.yun@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20250121145008.22936-1-chunfeng.yun@mediatek.com> References: <20250121145008.22936-1-chunfeng.yun@mediatek.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N There are three USB controllers on mt8196, each controller's wakeup control is different, add some specific versions for them. Here add only for dual-role controllers. Signed-off-by: Chunfeng Yun --- v2: add wakeup for dual-role controllers --- drivers/usb/mtu3/mtu3_host.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/usb/mtu3/mtu3_host.c b/drivers/usb/mtu3/mtu3_host.c index 7c657ea2dabd..d65b0f318436 100644 --- a/drivers/usb/mtu3/mtu3_host.c +++ b/drivers/usb/mtu3/mtu3_host.c @@ -46,6 +46,11 @@ #define WC1_IS_P_95 BIT(12) #define WC1_IS_EN_P0_95 BIT(6) +/* mt8196 */ +#define PERI_WK_CTRL0_8196 0x08 +#define WC0_IS_EN_P0_96 BIT(0) +#define WC0_IS_EN_P1_96 BIT(7) + /* mt2712 etc */ #define PERI_SSUSB_SPM_CTRL 0x0 #define SSC_IP_SLEEP_EN BIT(4) @@ -59,6 +64,8 @@ enum ssusb_uwk_vers { SSUSB_UWK_V1_3, /* mt8195 IP0 */ SSUSB_UWK_V1_5 = 105, /* mt8195 IP2 */ SSUSB_UWK_V1_6, /* mt8195 IP3 */ + SSUSB_UWK_V1_7, /* mt8196 IP0 */ + SSUSB_UWK_V1_8, /* mt8196 IP1 */ }; /* @@ -100,6 +107,16 @@ static void ssusb_wakeup_ip_sleep_set(struct ssusb_mtk *ssusb, bool enable) msk = WC0_IS_EN_P3_95 | WC0_IS_C_95(0x7) | WC0_IS_P_95; val = enable ? (WC0_IS_EN_P3_95 | WC0_IS_C_95(0x1)) : 0; break; + case SSUSB_UWK_V1_7: + reg = ssusb->uwk_reg_base + PERI_WK_CTRL0_8196; + msk = WC0_IS_EN_P0_96; + val = enable ? msk : 0; + break; + case SSUSB_UWK_V1_8: + reg = ssusb->uwk_reg_base + PERI_WK_CTRL0_8196; + msk = WC0_IS_EN_P1_96; + val = enable ? msk : 0; + break; case SSUSB_UWK_V2: reg = ssusb->uwk_reg_base + PERI_SSUSB_SPM_CTRL; msk = SSC_IP_SLEEP_EN | SSC_SPM_INT_EN;