From patchwork Thu Feb 6 11:15:35 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akash Kumar X-Patchwork-Id: 862939 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9579A22AE71; Thu, 6 Feb 2025 11:16:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738840616; cv=none; b=RW7yNCdIP8u84S/j77PO5z4qhDfzwvjqv0TMH72mUZRDUFhmvw/68nrHY9z1ghmmYhzyizYPjLZCy0dhkmaYNM/ZHaovQWKLUBFms6qHa4KexS9HF5HAS34FT1FaHMhATQNkCps6TfpvVjJpSCiIycDIMlsu+68vYOIusNIllV8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738840616; c=relaxed/simple; bh=BOwx6/aeZ2074a3PKyQcRGEZzSXU0flwFWloX/nzQVw=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=D0IrwJkdyHFWs3BU2ZUrzqmUY4LIz/ClyYIHmxh8CJ/wc8IaHS4jPQbUMSbWofv8JIh+cTkrHJiUntAMXxBFsKNF+mbtydotjqgixPUsNlLoUSukJM/2docgBmQhzHCgBxHAIPrJeIzwr84E3hKlvBqRhxUXLOoQRkZiqpKxqcs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=T9RQ880E; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="T9RQ880E" Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 5169lxq3026763; Thu, 6 Feb 2025 11:16:49 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-type:date:from:in-reply-to:message-id:mime-version :references:subject:to; s=qcppdkim1; bh=QYESYvG0Rvk/9d1tkzN2raXV Ct2tQ610K/YF9iQM8a8=; b=T9RQ880E1rxSyrCTDjlp3mocvey7vXrWtfZ5k7Ez 82PzP/XJP3rdRe6EXFMeLnpK4ayAStVJtSYR3wqA/itsbeoKAzkBDeUS41kQB3SI O40EmIbmMPw8mKOlBwxY3QZl7QmdFot3luM6VM36zQEn2+2ZR/k4qtsx5AGXBjcL rbFxEXiPOkgFYumnmyFsEtVaIMHarC5rZBLJtQZpRd2/IdiNXp+rhSf1mwhmlj1L tSU6k+SGkK1pCFNUNTW6XOy17mQWmr/4JmCPdcz5tdGNyel7KDnzKiXFmvl2NF3C 4yUcvsiYoIvwHUKC0V5SALhzCx+k3HoYDuV6lZ4g/rvirA== Received: from nasanppmta03.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 44mtrx876f-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 06 Feb 2025 11:16:49 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 516BGnGl014071 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 6 Feb 2025 11:16:49 GMT Received: from hu-akakum-hyd.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 6 Feb 2025 03:16:44 -0800 From: Akash Kumar To: Thinh Nguyen , Greg Kroah-Hartman , Jack Pham , , Wesley Cheng CC: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Vijayavardhan Vennapusa" , , , Akash Kumar Subject: [PATCH 10/18] arm64: dts: qcom: sdm630: Enable high bandwidth for hs isoc eps Date: Thu, 6 Feb 2025 16:45:35 +0530 Message-ID: <20250206111543.17392-11-quic_akakum@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250206111543.17392-1-quic_akakum@quicinc.com> References: <20250206111543.17392-1-quic_akakum@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: FZAD6IxXctlWam2qw1z9heaFXMQreJFo X-Proofpoint-GUID: FZAD6IxXctlWam2qw1z9heaFXMQreJFo X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-06_03,2025-02-05_03,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 impostorscore=0 priorityscore=1501 mlxlogscore=979 clxscore=1011 adultscore=0 spamscore=0 lowpriorityscore=0 suspectscore=0 bulkscore=0 phishscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502060092 It is observed while testing multiple audio devices, a glitch is observed during testing. As per dwc datasheet,By default, HC reserves 80% of the bandwidth for periodic EPs. Add quirk to set GUCTL BIT 16 to accommodate higher bandwidth for 2 isoc eps. If this bit is set, the bandwidth is relaxed to 85% to accommodate two high speed, high bandwidth ISOC EPs. USB 2.0 required 80% bandwidth allocated for ISOC traffic. If two High-bandwidth ISOC devices (HD Webcams) are connected, and if each requires 1024-bytes X 3 packets per Micro-Frame, then the bandwidth required is around 82%. If this bit is set, then it is possible to connect two Webcams of 1024bytes X 3 paylod per Micro-Frame each. Otherwise, you may have to reduce the resolution of the Webcams. This bit is valid in Host and DRD configuration and is used in host mode operation only. USe this quirk to set bit for host mode uvc uac usecases where two isoc eps are used and flicker is seen. Signed-off-by: Akash Kumar --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index a2c079bac1a7..985f1252d7fd 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -1302,6 +1302,7 @@ snps,parkmode-disable-ss-quirk; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; phys = <&qusb2phy0>, <&usb3_qmpphy>; phy-names = "usb2-phy", "usb3-phy"; @@ -1509,6 +1510,7 @@ snps,dis_enblslpm_quirk; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; /* This is the HS-only host */ maximum-speed = "high-speed";