| Message ID | 20250518-b4-k1-dwc3-v3-v3-3-7609c8baa2a6@whut.edu.cn |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add SpacemiT K1 USB3.0 host controller support | expand |
On Mon, May 19, 2025 at 11:37:30AM +0200, Krzysztof Kozlowski wrote: > On Sun, May 18, 2025 at 03:19:21AM GMT, Ze Huang wrote: > > diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi > > index 61f5ca250ded0da7b91cd4bbd55a5574a89c6ab0..164244fdb49f5d50a8abadb7b7e478cccc828087 100644 > > --- a/arch/riscv/boot/dts/spacemit/k1.dtsi > > +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi > > @@ -4,6 +4,8 @@ > > */ > > > > #include <dt-bindings/clock/spacemit,k1-syscon.h> > > +#include <dt-bindings/gpio/gpio.h> > > +#include <dt-bindings/phy/phy.h> > > > > /dts-v1/; > > / { > > @@ -346,6 +348,15 @@ soc { > > dma-noncoherent; > > ranges; > > > > + mbus0: dram-controller@0 { > > Missing compatible. > > > + reg = <0x0 0x00000000 0x0 0x80000000>; > > + reg-names = "dram"; > > Where are the bindings for this? > > > + #address-cells = <2>; > > + #size-cells = <2>; > > Why are these needed? > Will drop them > > + dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>; > > + #interconnect-cells = <0>; > > No, you cannot just add any properties to any custom node. You need ABI > for all this. > Thanks for correcting, will create a binding for it. > > + }; > > + > > syscon_rcpu: system-controller@c0880000 { > > compatible = "spacemit,k1-syscon-rcpu"; > > reg = <0x0 0xc0880000 0x0 0x2048>; > > @@ -358,6 +369,64 @@ syscon_rcpu2: system-controller@c0888000 { > > #reset-cells = <1>; > > }; > > > > + usb_dwc3: usb@c0a00000 { > > + compatible = "spacemit,k1-dwc3"; > > + reg = <0x0 0xc0a00000 0x0 0x10000>; > > + clocks = <&syscon_apmu CLK_USB30>; > > + clock-names = "usbdrd30"; > > + resets = <&syscon_apmu RESET_USB3_0>; > > + interrupt-parent = <&plic>; > > + interrupts = <125>; > > + interconnects = <&mbus0>; > > + interconnect-names = "dma-mem"; > > + phys = <&usbphy2>, <&combphy PHY_TYPE_USB3>; > > + phy-names = "usb2-phy", "usb3-phy"; > > + dr_mode = "host"; > > This does not look like property of the soc. > Will move `dr_mode` to board level > > + phy_type = "utmi"; > > + snps,hsphy_interface = "utmi"; > > + snps,dis_enblslpm_quirk; > > + snps,dis-u2-freeclk-exists-quirk; > > + snps,dis-del-phy-power-chg-quirk; > > + snps,dis_u2_susphy_quirk; > > + snps,dis_u3_susphy_quirk; > > + snps,dis_rxdet_inp3_quirk; > > + status = "disabled"; > > + }; > > + > > + usbphy0: phy@c0940000 { > > + compatible = "spacemit,k1-usb2-phy"; > > + reg = <0x0 0xc0940000 0x0 0x200>; > > + clocks = <&syscon_apmu CLK_USB_AXI>; > > + #phy-cells = <0>; > > + status = "disabled"; > > What is missing here? Why is this node disabled? > There're three USB controllers on K1 [1]: - A USB2.0 OTG - A USB2.0 Host Only - A USB3.0 with a USB2.0 DRD interface usbphy0 is for USB2.0 OTG, and ushphy1 is for USB2.0 Host Only. They're not supported yet. Link: https://developer.spacemit.com/documentation?token=AjHDwrW78igAAEkiHracBI9HnTb#part5 [1] > Best regards, > Krzysztof > > > >
diff --git a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts index 816ef1bc358ec490aff184d5915d680dbd9f00cb..c5832b399f96b6bbede02fbb019c7b616cedff77 100644 --- a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts +++ b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts @@ -28,6 +28,25 @@ led1 { default-state = "on"; }; }; + + usb3_vhub: regulator-vhub-5v { + compatible = "regulator-fixed"; + regulator-name = "USB30_VHUB"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio K1_GPIO(123) GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + usb3_vbus: regulator-vbus-5v { + compatible = "regulator-fixed"; + regulator-name = "USB30_VBUS"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + gpio = <&gpio K1_GPIO(97) GPIO_ACTIVE_HIGH>; + enable-active-high; + }; }; &uart0 { @@ -35,3 +54,34 @@ &uart0 { pinctrl-0 = <&uart0_2_cfg>; status = "okay"; }; + +&usbphy2 { + status = "okay"; +}; + +&combphy { + status = "okay"; +}; + +&usb_dwc3 { + vbus-supply = <&usb3_vbus>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + hub_2_0: hub@1 { + compatible = "usb2109,2817"; + reg = <0x1>; + vdd-supply = <&usb3_vhub>; + peer-hub = <&hub_3_0>; + reset-gpios = <&gpio K1_GPIO(124) GPIO_ACTIVE_LOW>; + }; + + hub_3_0: hub@2 { + compatible = "usb2109,817"; + reg = <0x1>; + vdd-supply = <&usb3_vhub>; + peer-hub = <&hub_2_0>; + reset-gpios = <&gpio K1_GPIO(124) GPIO_ACTIVE_LOW>; + }; +}; diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi index 61f5ca250ded0da7b91cd4bbd55a5574a89c6ab0..164244fdb49f5d50a8abadb7b7e478cccc828087 100644 --- a/arch/riscv/boot/dts/spacemit/k1.dtsi +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi @@ -4,6 +4,8 @@ */ #include <dt-bindings/clock/spacemit,k1-syscon.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/phy/phy.h> /dts-v1/; / { @@ -346,6 +348,15 @@ soc { dma-noncoherent; ranges; + mbus0: dram-controller@0 { + reg = <0x0 0x00000000 0x0 0x80000000>; + reg-names = "dram"; + #address-cells = <2>; + #size-cells = <2>; + dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>; + #interconnect-cells = <0>; + }; + syscon_rcpu: system-controller@c0880000 { compatible = "spacemit,k1-syscon-rcpu"; reg = <0x0 0xc0880000 0x0 0x2048>; @@ -358,6 +369,64 @@ syscon_rcpu2: system-controller@c0888000 { #reset-cells = <1>; }; + usb_dwc3: usb@c0a00000 { + compatible = "spacemit,k1-dwc3"; + reg = <0x0 0xc0a00000 0x0 0x10000>; + clocks = <&syscon_apmu CLK_USB30>; + clock-names = "usbdrd30"; + resets = <&syscon_apmu RESET_USB3_0>; + interrupt-parent = <&plic>; + interrupts = <125>; + interconnects = <&mbus0>; + interconnect-names = "dma-mem"; + phys = <&usbphy2>, <&combphy PHY_TYPE_USB3>; + phy-names = "usb2-phy", "usb3-phy"; + dr_mode = "host"; + phy_type = "utmi"; + snps,hsphy_interface = "utmi"; + snps,dis_enblslpm_quirk; + snps,dis-u2-freeclk-exists-quirk; + snps,dis-del-phy-power-chg-quirk; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + snps,dis_rxdet_inp3_quirk; + status = "disabled"; + }; + + usbphy0: phy@c0940000 { + compatible = "spacemit,k1-usb2-phy"; + reg = <0x0 0xc0940000 0x0 0x200>; + clocks = <&syscon_apmu CLK_USB_AXI>; + #phy-cells = <0>; + status = "disabled"; + }; + + usbphy1: phy@c09c0000 { + compatible = "spacemit,k1-usb2-phy"; + reg = <0x0 0xc09c0000 0x0 0x200>; + clocks = <&syscon_apmu CLK_USB_P1>; + #phy-cells = <0>; + status = "disabled"; + }; + + usbphy2: phy@c0a30000 { + compatible = "spacemit,k1-usb2-phy"; + reg = <0x0 0xc0a30000 0x0 0x200>; + clocks = <&syscon_apmu CLK_USB30>; + #phy-cells = <0>; + status = "disabled"; + }; + + combphy: phy@c0b10000 { + compatible = "spacemit,k1-combphy"; + reg = <0x0 0xc0b10000 0x0 0x800>, + <0x0 0xd4282910 0x0 0x400>; + reg-names = "ctrl", "sel"; + resets = <&syscon_apmu RESET_PCIE0>; + #phy-cells = <1>; + status = "disabled"; + }; + syscon_apbc: system-control@d4015000 { compatible = "spacemit,k1-syscon-apbc"; reg = <0x0 0xd4015000 0x0 0x1000>;
Add USB 3.0 support for the SpacemiT K1 SoC, including the following components: - USB 2.0 PHY nodes - USB 3.0 combo PHY node - USB 3.0 host controller - USB 3.0 hub and vbus regulator (usb3_vhub, usb3_vbus) - DRAM interconnect node for USB DMA ("dma-mem") The `usb3_vbus` and `usb3_vhub` regulator node provides a fixed 5V supply to power the onboard USB 3.0 hub and usb vbus. On K1, some DMA transfers from devices to memory use separate buses with different DMA address translation rules from the parent node. We express this relationship through the interconnects node "dma-mem", similar to [1]. Link: https://lore.kernel.org/all/09e5e29a4c54ec7337e4e62e5d6001b69d92b103.1554108995.git-series.maxime.ripard@bootlin.com [1] Signed-off-by: Ze Huang <huangze@whut.edu.cn> --- arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts | 50 ++++++++++++++++++ arch/riscv/boot/dts/spacemit/k1.dtsi | 69 +++++++++++++++++++++++++ 2 files changed, 119 insertions(+)