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bus: mhi: host: Add support for mhi bus bw
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As per MHI spec sec 14, MHI supports bandwidth scaling to reduce power consumption. MHI bandwidth scaling is advertised in devices that contain the bandwidth scaling capability registers. If enabled, the device aggregates bandwidth requirements and sends them to the host in the form of an event. After the host performs the bandwidth switch, it sends an acknowledgment by ringing a doorbell. if the host supports bandwidth scaling events, then it must set BW_CFG.ENABLED bit, set BW_CFG.DB_CHAN_ID to the channel ID to the doorbell that will be used by the host to communicate the bandwidth scaling status and BW_CFG.ER_INDEX to the index for the event ring to which the device should send bandwidth scaling request in the bandwidth scaling capability register. As part of mmio init check if the bw scale capability is present or not, if present advertise host supports bw scale by setting all the required fields. MHI layer will only forward the bw scaling request to the controller driver, it is responsibility of the controller driver to do actual bw scaling and then pass status to the MHI. MHI will response back to the device based up on the status of the bw scale received. Add a new get_misc_doorbell() to get doorbell for misc capabilities to use the doorbell with mhi events like MHI BW scale etc. Use workqueue & mutex for the bw scale events as the pci_set_target_speed() which will called by the mhi controller driver can sleep. If the driver want to move higher data rate/speed then the current data rate/speed then the controller driver may need to change certain votes so that link may come up in requested data rate/speed like QCOM PCIe controllers need to change their RPMh (Resource Power Manager-hardened) state. And also once link retraining is done controller drivers needs to adjust their votes based on the final data rate/speed. Some controllers also may need to update their bandwidth voting like ICC bw votings etc. So, add pre_scale_bus_bw() & post_scale_bus_bw() op to call before & after the link re-train. In case of PCIe switch, if there is a request to change target speed for a downstream port then no need to call these function ops as these are outside the scope of the controller drivers. Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> --- Krishna Chaitanya Chundru (6): PCI: update current bus speed as part of pci_bus_add_devices() PCI/bwctrl: Add support to scale bandwidth before & after link re-training PCI: dwc: Implement .pre_scale_bus_bw() & .post_scale_bus_bw hook PCI: dwc: qcom: Update ICC & OPP votes based upon the requested speed bus: mhi: host: Add support for Bandwidth scale PCI: Make pcie_link_speed variable public & export pci_set_target_speed() Miaoqing Pan (1): wifi: ath11k: add support for MHI bandwidth scaling Vivek Pernamitta (1): bus: mhi: host: Add support to read MHI capabilities drivers/bus/mhi/common.h | 18 ++++ drivers/bus/mhi/host/init.c | 93 ++++++++++++++++++- drivers/bus/mhi/host/internal.h | 7 +- drivers/bus/mhi/host/main.c | 102 ++++++++++++++++++++- drivers/bus/mhi/host/pm.c | 10 ++- drivers/net/wireless/ath/ath11k/mhi.c | 41 +++++++++ drivers/pci/bus.c | 3 + drivers/pci/controller/dwc/pcie-designware-host.c | 21 +++++ drivers/pci/controller/dwc/pcie-designware.h | 2 + drivers/pci/controller/dwc/pcie-qcom.c | 105 ++++++++++++++++------ drivers/pci/pci.h | 1 - drivers/pci/pcie/bwctrl.c | 16 ++++ include/linux/mhi.h | 13 +++ include/linux/pci.h | 3 + 14 files changed, 402 insertions(+), 33 deletions(-) --- base-commit: 0ad2507d5d93f39619fc42372c347d6006b64319 change-id: 20250217-mhi_bw_up-f31306a5631b Best regards,