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+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) [2022-2025] Renesas Electronics Corporation and/or its affiliates.
+ */
+
+#ifndef RA6W_PARAMS_H
+#define RA6W_PARAMS_H
+
+#define RA6W_PHY_MINOR_VERSION(v) (((v) & 0x00FF0000) >> 16)
+#define RA6W_PHY_MAJOR_VERSION(v) (((v) & 0xFF000000) >> 24)
+#define RA6W_PHY_VERSION(v) \
+ ((RA6W_PHY_MAJOR_VERSION(v) + 2) * 10 + RA6W_PHY_MINOR_VERSION(v))
+
+enum ra6w_params_dev_feat {
+ RA6W_DEV_FEAT_BCN_BIT,
+ RA6W_DEV_FEAT_RADAR_BIT,
+ RA6W_DEV_FEAT_PS_BIT,
+ RA6W_DEV_FEAT_UAPSD_BIT,
+ RA6W_DEV_FEAT_AMPDU_BIT,
+ RA6W_DEV_FEAT_AMSDU_BIT,
+ RA6W_DEV_FEAT_P2P_BIT,
+ RA6W_DEV_FEAT_P2P_GO_BIT,
+ RA6W_DEV_FEAT_UMAC_BIT,
+ RA6W_DEV_FEAT_VHT_BIT,
+ RA6W_DEV_FEAT_BFMEE_BIT,
+ RA6W_DEV_FEAT_BFMER_BIT,
+ RA6W_DEV_FEAT_WAPI_BIT,
+ RA6W_DEV_FEAT_MFP_BIT,
+ RA6W_DEV_FEAT_MU_MIMO_RX_BIT,
+ RA6W_DEV_FEAT_MU_MIMO_TX_BIT,
+ RA6W_DEV_FEAT_MESH_BIT,
+ RA6W_DEV_FEAT_TDLS_BIT,
+ RA6W_DEV_FEAT_ANT_DIV_BIT,
+ RA6W_DEV_FEAT_UF_BIT,
+ RA6W_DEV_FEAT_AMSDU_MAX_SIZE_0_BIT,
+ RA6W_DEV_FEAT_AMSDU_MAX_SIZE_1_BIT,
+ RA6W_DEV_FEAT_MON_DATA_BIT,
+ RA6W_DEV_FEAT_HE_BIT,
+ RA6W_DEV_FEAT_TWT_BIT,
+ RA6W_DEV_FEAT_FTM_INIT_BIT,
+ RA6W_DEV_FEAT_FAKE_FTM_RSP_BIT,
+ RA6W_DEV_FEAT_HW_LLCSNAP_INS_BIT,
+ RA6W_DEV_FEAT_MAX
+};
+
+enum ra6w_params_mac_feat {
+ RA6W_MAC_FEAT_QOS_BIT,
+ RA6W_MAC_FEAT_EDCA_BIT,
+ RA6W_MAC_FEAT_SME_BIT,
+ RA6W_MAC_FEAT_SECURITY_BIT,
+ RA6W_MAC_FEAT_WEP_BIT,
+ RA6W_MAC_FEAT_TKIP_BIT,
+ RA6W_MAC_FEAT_CCMP_BIT,
+ RA6W_MAC_FEAT_RCE_BIT,
+ RA6W_MAC_FEAT_GCMP_BIT,
+ RA6W_MAC_FEAT_HT_BIT,
+ RA6W_MAC_FEAT_VHT_BIT,
+ RA6W_MAC_FEAT_TPC_BIT,
+ RA6W_MAC_FEAT_WAPI_BIT,
+ RA6W_MAC_FEAT_COEX_BIT,
+ RA6W_MAC_FEAT_HE_BIT,
+ RA6W_MAC_FEAT_RESERVED_BIT,
+ RA6W_MAC_FEAT_BFMEE_BIT,
+ RA6W_MAC_FEAT_BFMER_BIT,
+ RA6W_MAC_FEAT_MU_MIMO_TX_BIT,
+
+ RA6W_MAC_FEAT_MAX,
+};
+
+struct ra6w_params_dev_features {
+ bool tdls_supported;
+ bool amsdu_supported;
+ bool vht_supported;
+ bool he_supported;
+ bool he_ul_on;
+ bool bfmee_enabled;
+ bool ps_supported;
+ bool wapi_supported;
+ bool mfp_supported;
+ bool gcmp_supported;
+ bool radar_supported;
+ bool mu_mimo_rx_enabled;
+ bool mu_mimo_tx_enabled;
+ bool twt_enabled;
+ u8 nss;
+ u32 uapsd_threshold;
+ u8 bw_max;
+};
+
+struct ra6w_params_module_params {
+ bool stbc_enabled;
+ bool ldpc_enabled;
+ bool ant_div;
+ bool ht_supported;
+ bool amsdu_require_spp;
+ bool bfmer_enabled;
+ bool dpsm_enabled;
+ bool ap_uapsd_enabled;
+ bool use_sgi;
+ bool ccmp256_supported;
+ char *regdom_mode;
+ u8 mcs_map_range;
+ u8 he_mcs_map_range;
+ u8 rx_amsdu_size;
+ u32 log_level;
+};
+
+struct ra6w_params {
+ struct ra6w_params_dev_features features;
+ struct ra6w_params_module_params module_params;
+};
+
+extern struct ra6w_params ra6w_params_list;
+
+int ra6w_params_init(struct ra6w_core *core);
+bool ra6w_params_regd_mode_is_auto(void);
+int ra6w_params_regd_set_self(struct wiphy *wiphy);
+bool ra6w_params_ps_supported(void);
+bool ra6w_params_dpsm_enabled(void);
+bool ra6w_params_amsdu_require_spp(void);
+bool ra6w_params_ht_supported(void);
+bool ra6w_params_vht_supported(void);
+bool ra6w_params_he_supported(void);
+bool ra6w_params_he_ul_on(void);
+bool ra6w_params_wapi_supported(void);
+bool ra6w_params_mfp_supported(void);
+bool ra6w_params_ap_uapsd_enabled(void);
+bool ra6w_params_tdls_supported(void);
+bool ra6w_params_gcmp_supported(void);
+bool ra6w_params_ccmp256_supported(void);
+bool ra6w_params_bfmee_enabled(void);
+bool ra6w_params_bfmer_enabled(void);
+bool ra6w_params_ldpc_enabled(void);
+bool ra6w_params_stbc_enabled(void);
+u8 ra6w_params_bw_max_get(void);
+bool ra6w_params_use_sgi(void);
+bool ra6w_params_mu_mimo_rx_enabled(void);
+bool ra6w_params_mu_mimo_tx_enabled(void);
+bool ra6w_params_twt_enabled(void);
+bool ra6w_params_ant_div(void);
+u32 ra6w_params_log_level(void);
+void ra6w_params_log_level_set(u32 log_level);
+u8 ra6w_params_nss(void);
+u8 ra6w_params_rx_amsdu_size(void);
+u8 ra6w_params_mcs_map_range(void);
+u8 ra6w_params_he_mcs_map_range(void);
+u32 ra6w_params_uapsd_threshold(void);
+
+#endif /* RA6W_PARAMS_H */