From patchwork Wed Jun 4 14:45:08 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 894161 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7752F28ECF0; Wed, 4 Jun 2025 14:45:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749048349; cv=none; b=Gy25B95cz44VH/YZOPS0iL6e5S0dlJuuAYm6Gs1noT2dFkcq8hWQh0h2Xo7RHvxBBfDe6cWYTyqk5ad5ZyY1BiVtHbMrI1FLXqXFT1SdLwZRgbRVnNHaL2L7M4vYgQzs2w+GRjbu0Z9KBmp1gp1PI7WPCCb0ZBdMWoqOZw7jNW8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749048349; c=relaxed/simple; bh=BgxRJHC6oF+kTQhHO5k63lZHrNXK0+LyXcoaTmPrZAw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=DClt9UkFyOfdhwZvsWTHua1P+MmFlFXo+SPaitcQxfm3ym7d3aUtJ6pk3W5Fe8bMEXnRbZlxHFjwg+iaknrK7zRNnyWOP4rf190XB0cpNdXcH79e1XoOICaXd6IN3sXNErhB2M46/L9VlkyRhztZo+WFtMqv4gob0iLLcAHy4aU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ilomGt0v; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ilomGt0v" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 36462C4AF0B; Wed, 4 Jun 2025 14:45:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1749048349; bh=BgxRJHC6oF+kTQhHO5k63lZHrNXK0+LyXcoaTmPrZAw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ilomGt0vO7G0ZKfNt9shwPqg1z2eu3gj4KxKipyJrApnoMZAXv8SbnhdgQisKqfDV 4eI2vhV8dwVK8/7vx5GcikdI4DFHVV9wHsca+7pypVYjXQ7jqXVDLHjK0mRJ6noK+B p8Mg5/eT4uc3Xvxeq24S8rvwdBgn1OGRUzi2ldq4ILg+ZztsvrIvz42FQCDQM+mHG7 QQUSixi7xWA8KfhS0c/lP6vjmaJOyApxOtZFGkO7lQAWN9hIEP7lJzagKMopW/wYjQ ripE/n4T/QHD2yFpDvkBN4fjedDsilTX6dOpRy/wqmJBzqjl4EzsEFfqFmMt89pPvw EnmGNbvtXumNw== Received: from johan by xi.lan with local (Exim 4.97.1) (envelope-from ) id 1uMpND-000000007Od-1Vqg; Wed, 04 Jun 2025 16:45:47 +0200 From: Johan Hovold To: Jeff Johnson Cc: Miaoqing Pan , Remi Pommarel , Baochen Qiang , linux-wireless@vger.kernel.org, ath12k@lists.infradead.org, linux-kernel@vger.kernel.org, Johan Hovold , stable@vger.kernel.org Subject: [PATCH v2 3/4] wifi: ath12k: fix source ring-buffer corruption Date: Wed, 4 Jun 2025 16:45:08 +0200 Message-ID: <20250604144509.28374-4-johan+linaro@kernel.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250604144509.28374-1-johan+linaro@kernel.org> References: <20250604144509.28374-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-wireless@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add the missing memory barrier to make sure that LMAC source ring descriptors are written before updating the head pointer to avoid passing stale data to the firmware on weakly ordered architectures like aarch64. Note that non-LMAC rings use MMIO write accessors which have the required write memory barrier. Tested-on: WCN7850 hw2.0 WLAN.HMT.1.0.c5-00481-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3 Fixes: d889913205cf ("wifi: ath12k: driver for Qualcomm Wi-Fi 7 devices") Cc: stable@vger.kernel.org # 6.3 Signed-off-by: Johan Hovold --- drivers/net/wireless/ath/ath12k/hal.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/net/wireless/ath/ath12k/hal.c b/drivers/net/wireless/ath/ath12k/hal.c index 8615578bb802..1e2d13cc2d19 100644 --- a/drivers/net/wireless/ath/ath12k/hal.c +++ b/drivers/net/wireless/ath/ath12k/hal.c @@ -2161,7 +2161,11 @@ void ath12k_hal_srng_access_end(struct ath12k_base *ab, struct hal_srng *srng) if (srng->ring_dir == HAL_SRNG_DIR_SRC) { srng->u.src_ring.last_tp = *(volatile u32 *)srng->u.src_ring.tp_addr; - *srng->u.src_ring.hp_addr = srng->u.src_ring.hp; + /* Make sure descriptor is written before updating the + * head pointer. + */ + dma_wmb(); + WRITE_ONCE(*srng->u.src_ring.hp_addr, srng->u.src_ring.hp); } else { srng->u.dst_ring.last_hp = *srng->u.dst_ring.hp_addr; *srng->u.dst_ring.tp_addr = srng->u.dst_ring.tp; @@ -2170,6 +2174,10 @@ void ath12k_hal_srng_access_end(struct ath12k_base *ab, struct hal_srng *srng) if (srng->ring_dir == HAL_SRNG_DIR_SRC) { srng->u.src_ring.last_tp = *(volatile u32 *)srng->u.src_ring.tp_addr; + /* Assume implementation use an MMIO write accessor + * which has the required wmb() so that the descriptor + * is written before the updating the head pointer. + */ ath12k_hif_write32(ab, (unsigned long)srng->u.src_ring.hp_addr - (unsigned long)ab->mem,