From patchwork Tue Jun 17 08:44:01 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 897514 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9D19128FFF3; Tue, 17 Jun 2025 08:44:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750149890; cv=none; b=WkRNN7cW+UmvMS09F8eZoYKlMe7lR59THdxyE67alKOcsrpevMFAxwfr4xysDy/Nm9Fb1V5NrnY6fjpNLKR7RZjg+zaqANX4vfXL9IVyg9ldwfRngJR6zmRNBAFVqJhsvHXp1km2vdr52ZyIP0v1HIUJzvsaa4rXNs3Jtsnk6U0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750149890; c=relaxed/simple; bh=+MUNkeZX4lfJkqkDUxXwsfHCfiNVsvvgpyJ+FU0nu4g=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Q5BE+RTZ9p6lpmljjm6ol2sH59vSAoy1t3eki6/iUwUQV6toDB94Z9XU3zKrcGOr0lIyYuVQy5ddsQ3tAktsmQzCD+bedynJensUnP0IrfcmLXl5fW1sukp3q1BG4WlLhNfkVvu8kFhRix8eLqg+5JsBskLw7SJnyjRUyQOUBCA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=eiG6I71H; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="eiG6I71H" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 53BBDC4CEF6; Tue, 17 Jun 2025 08:44:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1750149890; bh=+MUNkeZX4lfJkqkDUxXwsfHCfiNVsvvgpyJ+FU0nu4g=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eiG6I71H+yRSGnNvzn7KWYE8hPyV9oZX8el5NBvINVCLx3keaZadfp29ObB/xOMkj iUIzGcANaK/yegxiFSNfBhbfL2snUKvqJjgCPLRmIO4+86pn6DPwwjN77tAXxFr4uu 5DM138I5Wq5X0WvqWV7qTlsDqdKjhqWzdfSB7OStiMnTw8gH7Zd/znkplpdRWwJyKT 20C5uHpXLAQmaM4Y9LC6/ZFQ74sLFb89zOPLtmGnLj6nGZZ90Xcd9FviR2iYv9CvH5 sE7PJ+wcUAoLy/WKIT6HRNSsC5q7GGWVxBU+PLh9eQdO7hYeAbC38Pp8qMwoajy/B9 d9z+1vl7IRMBQ== Received: from johan by xi.lan with local (Exim 4.97.1) (envelope-from ) id 1uRRw0-000000003ms-0xB1; Tue, 17 Jun 2025 10:44:48 +0200 From: Johan Hovold To: Jeff Johnson Cc: Miaoqing Pan , Remi Pommarel , Baochen Qiang , linux-wireless@vger.kernel.org, ath12k@lists.infradead.org, linux-kernel@vger.kernel.org, Johan Hovold , stable@vger.kernel.org Subject: [PATCH v3 3/4] wifi: ath12k: fix source ring-buffer corruption Date: Tue, 17 Jun 2025 10:44:01 +0200 Message-ID: <20250617084402.14475-4-johan+linaro@kernel.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250617084402.14475-1-johan+linaro@kernel.org> References: <20250617084402.14475-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-wireless@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add the missing memory barrier to make sure that LMAC source ring descriptors are written before updating the head pointer to avoid passing stale data to the firmware on weakly ordered architectures like aarch64. Note that non-LMAC rings use MMIO write accessors which have the required write memory barrier. Tested-on: WCN7850 hw2.0 WLAN.HMT.1.0.c5-00481-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3 Fixes: d889913205cf ("wifi: ath12k: driver for Qualcomm Wi-Fi 7 devices") Cc: stable@vger.kernel.org # 6.3 Signed-off-by: Johan Hovold --- drivers/net/wireless/ath/ath12k/hal.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/net/wireless/ath/ath12k/hal.c b/drivers/net/wireless/ath/ath12k/hal.c index 726969cfcaec..d8193d9577bb 100644 --- a/drivers/net/wireless/ath/ath12k/hal.c +++ b/drivers/net/wireless/ath/ath12k/hal.c @@ -2178,7 +2178,11 @@ void ath12k_hal_srng_access_end(struct ath12k_base *ab, struct hal_srng *srng) if (srng->ring_dir == HAL_SRNG_DIR_SRC) { srng->u.src_ring.last_tp = *(volatile u32 *)srng->u.src_ring.tp_addr; - *srng->u.src_ring.hp_addr = srng->u.src_ring.hp; + /* Make sure descriptor is written before updating the + * head pointer. + */ + dma_wmb(); + WRITE_ONCE(*srng->u.src_ring.hp_addr, srng->u.src_ring.hp); } else { srng->u.dst_ring.last_hp = *srng->u.dst_ring.hp_addr; *srng->u.dst_ring.tp_addr = srng->u.dst_ring.tp; @@ -2187,6 +2191,10 @@ void ath12k_hal_srng_access_end(struct ath12k_base *ab, struct hal_srng *srng) if (srng->ring_dir == HAL_SRNG_DIR_SRC) { srng->u.src_ring.last_tp = *(volatile u32 *)srng->u.src_ring.tp_addr; + /* Assume implementation use an MMIO write accessor + * which has the required wmb() so that the descriptor + * is written before the updating the head pointer. + */ ath12k_hif_write32(ab, (unsigned long)srng->u.src_ring.hp_addr - (unsigned long)ab->mem,