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[81.240.219.193]) by mx.google.com with ESMTPSA id s46sm39364798ees.3.2014.05.06.08.26.36 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 06 May 2014 08:26:37 -0700 (PDT) From: Jean Pihet To: Jiri Olsa , Arnaldo Carvalho de Melo , will.deacon@arm.com Cc: "linux-kernel@vger.kernel.org" , "linaro-kernel@lists.linaro.org" , "linux-arm-kernel@lists.infradead.org" , Jean Pihet , Corey Ashford , Frederic Weisbecker , Ingo Molnar , Namhyung Kim , Paul Mackerras , Peter Zijlstra , David Ahern Subject: [PATCH 1/3] perf tests: Introduce perf_regs_load function on ARM Date: Tue, 6 May 2014 17:26:17 +0200 Message-Id: <1399389979-11279-2-git-send-email-jean.pihet@linaro.org> X-Mailer: git-send-email 1.7.11.7 In-Reply-To: <1399389979-11279-1-git-send-email-jean.pihet@linaro.org> References: <1399389979-11279-1-git-send-email-jean.pihet@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: jean.pihet@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: patch+caf_=patchwork-forward=linaro.org@linaro.org does not designate permitted sender hosts) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Introducing perf_regs_load function, which is going to be used for dwarf unwind test in following patches. It takes single argument as a pointer to the regs dump buffer and populates it with current registers values. Signed-off-by: Jean Pihet Cc: Corey Ashford Cc: Frederic Weisbecker Cc: Ingo Molnar Cc: Namhyung Kim Cc: Paul Mackerras Cc: Peter Zijlstra Cc: Arnaldo Carvalho de Melo Cc: David Ahern Cc: Jiri Olsa --- tools/perf/arch/arm/Makefile | 1 + tools/perf/arch/arm/include/perf_regs.h | 2 ++ tools/perf/arch/arm/tests/regs_load.S | 60 +++++++++++++++++++++++++++++++++ 3 files changed, 63 insertions(+) create mode 100644 tools/perf/arch/arm/tests/regs_load.S diff --git a/tools/perf/arch/arm/Makefile b/tools/perf/arch/arm/Makefile index 67e9b3d..9b8f87e 100644 --- a/tools/perf/arch/arm/Makefile +++ b/tools/perf/arch/arm/Makefile @@ -4,4 +4,5 @@ LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/dwarf-regs.o endif ifndef NO_LIBUNWIND LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/unwind-libunwind.o +LIB_OBJS += $(OUTPUT)arch/$(ARCH)/tests/regs_load.o endif diff --git a/tools/perf/arch/arm/include/perf_regs.h b/tools/perf/arch/arm/include/perf_regs.h index 2a1cfde..1476ae7 100644 --- a/tools/perf/arch/arm/include/perf_regs.h +++ b/tools/perf/arch/arm/include/perf_regs.h @@ -5,6 +5,8 @@ #include "../../util/types.h" #include +void perf_regs_load(u64 *regs); + #define PERF_REGS_MASK ((1ULL << PERF_REG_ARM_MAX) - 1) #define PERF_REG_IP PERF_REG_ARM_PC #define PERF_REG_SP PERF_REG_ARM_SP diff --git a/tools/perf/arch/arm/tests/regs_load.S b/tools/perf/arch/arm/tests/regs_load.S new file mode 100644 index 0000000..66a10b6 --- /dev/null +++ b/tools/perf/arch/arm/tests/regs_load.S @@ -0,0 +1,60 @@ +#include +#include + +#define R0 0x00 +#define R1 0x08 +#define R2 0x10 +#define R3 0x18 +#define R4 0x20 +#define R5 0x28 +#define R6 0x30 +#define R7 0x38 +#define R8 0x40 +#define R9 0x48 +#define SL 0x50 +#define FP 0x58 +#define IP 0x60 +#define SP 0x68 +#define LR 0x70 +#define PC 0x78 + +/* + * Implementation of void perf_regs_load(u64 *regs); + * + * This functions fills in the 'regs' buffer from the actual registers values, + * in the way the perf built-in unwinding test expects them: + * - the return values (i.e. caller values) of fp, sp and lr are retrieved + * and stored from the fp, in order to skip the call to this function. + * The built-in unwinding test then unwinds the call stack from the dwarf + * information in unwind__get_entries. + * + * Notes: + * - the 8 bytes stride in the registers offsets comes from the fact + * that the registers are stored in an u64 array (u64 *regs), + * - since perf is built with -fno-omit-frame-pointer, the fp value can + * be used to retrieve the caller values of fp, sp, lr. + */ + +.text +ENTRY(perf_regs_load) + str r0, [r0, #R0] + str r1, [r0, #R1] + str r2, [r0, #R2] + str r3, [r0, #R3] + str r4, [r0, #R4] + str r5, [r0, #R5] + str r6, [r0, #R6] + str r7, [r0, #R7] + str r8, [r0, #R8] + str r9, [r0, #R9] + str sl, [r0, #SL] + ldr r2, [fp, #-12] @ retrieve and save return fp + str r2, [r0, #FP] + str ip, [r0, #IP] + ldr r2, [fp, #-8] @ retrieve and save return sp + str r2, [r0, #SP] + ldr r2, [fp, #-4] @ retrieve and save return lr + str r2, [r0, #LR] + str pc, [r0, #PC] + mov pc, lr +ENDPROC(perf_regs_load)