From patchwork Thu Apr 21 11:04:29 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Griffin X-Patchwork-Id: 66363 Delivered-To: patch@linaro.org Received: by 10.140.93.198 with SMTP id d64csp73429qge; Thu, 21 Apr 2016 04:05:34 -0700 (PDT) X-Received: by 10.66.66.108 with SMTP id e12mr19643595pat.92.1461236733904; Thu, 21 Apr 2016 04:05:33 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w10si167810pfa.53.2016.04.21.04.05.33; Thu, 21 Apr 2016 04:05:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752422AbcDULFT (ORCPT + 29 others); Thu, 21 Apr 2016 07:05:19 -0400 Received: from mail-wm0-f42.google.com ([74.125.82.42]:35170 "EHLO mail-wm0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752340AbcDULFL (ORCPT ); Thu, 21 Apr 2016 07:05:11 -0400 Received: by mail-wm0-f42.google.com with SMTP id e201so82488484wme.0 for ; Thu, 21 Apr 2016 04:05:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=fEyYLUK5DUGz+1xe3HEE99ER0sihzZNHGQAMhOrLCxc=; b=eL5yO2tmdNqShjvX3CAbMpykVHe14qDFeItQUAeodA+GTG/vPkNsc4ZSmLAxqw9HmZ 3yAHrMGJMHbsaAbokroJAb35jmT86lFlhoZqdvO+ufBgzdARyNzX2TCoik1wkWQ8yrnr yKauRlciH4ACyAUNwh27Bex5hei62jpOsnuNM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=fEyYLUK5DUGz+1xe3HEE99ER0sihzZNHGQAMhOrLCxc=; b=CQdej0A6q6TrdrWjQNg+fZVkh36dTwqhj3AD06l73ISCT/qh+GKmgkoxyB9iDg31Cs XMrWm4OnWYeQS5pR1r+BQfL51Y/peEZ+7NkLS7LozuqlbPqfj1BKeXZhTnNSyGr8kHwq VvXZx6btFSR338zItloZWjwDJN720ot+203kUBY8RoFWhRZwxtAWGBH8zpqjfURpnLs5 pP6fHOli8LB3ppwFt+a+JCeqb8zAK6S1uDtxrBjvR5TcgwmKAdtZ4zwbxmMfjgGd63BO uUesqPrMt8cctDh46IZ7Ei5TXo0VAg7tthKGFBPcMbgekeNaPf0qitKtMZzWYULSwZEB +rCA== X-Gm-Message-State: AOPr4FUl3ujavG+kPKsK1z5AXRgJD/Rr33j8PyaJzENI7DYBYLsC1dQlIaDkKEdCCkSuEgIX X-Received: by 10.28.214.137 with SMTP id n131mr14279640wmg.33.1461236710430; Thu, 21 Apr 2016 04:05:10 -0700 (PDT) Received: from localhost.localdomain (cpc84787-aztw28-2-0-cust15.18-1.cable.virginm.net. [82.37.140.16]) by smtp.gmail.com with ESMTPSA id v143sm9184279wmv.4.2016.04.21.04.05.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 21 Apr 2016 04:05:09 -0700 (PDT) From: Peter Griffin To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, srinivas.kandagatla@gmail.com, maxime.coquelin@st.com, patrice.chotard@st.com, vinod.koul@intel.com Cc: peter.griffin@linaro.org, lee.jones@linaro.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, arnd@arndb.de, broonie@kernel.org, ludovic.barre@st.com Subject: [PATCH 12/18] ARM: DT: STiH407: Add i2s_out pinctrl configuration Date: Thu, 21 Apr 2016 12:04:29 +0100 Message-Id: <1461236675-10176-13-git-send-email-peter.griffin@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1461236675-10176-1-git-send-email-peter.griffin@linaro.org> References: <1461236675-10176-1-git-send-email-peter.griffin@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds the pinctrl config for the i2s_out pins used by the uniperif player IP. Signed-off-by: Peter Griffin --- arch/arm/boot/dts/stih407-pinctrl.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) -- 1.9.1 diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi index a538ae5..0fb5c8a 100644 --- a/arch/arm/boot/dts/stih407-pinctrl.dtsi +++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi @@ -1067,6 +1067,29 @@ }; }; + i2s_out { + pinctrl_i2s_8ch_out: i2s_8ch_out{ + st,pins { + mclk = <&pio33 5 ALT1 OUT>; + lrclk = <&pio33 7 ALT1 OUT>; + sclk = <&pio33 6 ALT1 OUT>; + data0 = <&pio33 4 ALT1 OUT>; + data1 = <&pio34 0 ALT1 OUT>; + data2 = <&pio34 1 ALT1 OUT>; + data3 = <&pio34 2 ALT1 OUT>; + }; + }; + + pinctrl_i2s_2ch_out: i2s_2ch_out{ + st,pins { + mclk = <&pio33 5 ALT1 OUT>; + lrclk = <&pio33 7 ALT1 OUT>; + sclk = <&pio33 6 ALT1 OUT>; + data0 = <&pio33 4 ALT1 OUT>; + }; + }; + }; + serial3 { pinctrl_serial3: serial3-0 { st,pins {