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([80.12.39.177]) by smtp.gmail.com with ESMTPSA id kz1sm7374554wjc.46.2016.05.18.01.42.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 18 May 2016 01:42:16 -0700 (PDT) From: Gabriel Fernandez To: Rob Herring , Mark Rutland , Ian Campbell , Kumar Gala , Srinivas Kandagatla , Maxime Coquelin , Patrice Chotard , Russell King , Michael Turquette , Stephen Boyd , Olivier Bideau , Gabriel Fernandez , Geert Uytterhoeven , Sebastian Hesselbarth , Andrzej Hajda , Pankaj Dev , Dinh Nguyen , Arnd Bergmann , Thierry Reding Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@stlinux.com, linux-clk@vger.kernel.org, Lee Jones , Peter Griffin , , , Subject: [PATCH 10/11] ARM: DT: STi: STiH407: clock configuration to address 720p and 1080p Date: Wed, 18 May 2016 10:41:31 +0200 Message-Id: <1463560892-7209-11-git-send-email-gabriel.fernandez@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1463560892-7209-1-git-send-email-gabriel.fernandez@linaro.org> References: <1463560892-7209-1-git-send-email-gabriel.fernandez@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org It is necessary to properly configure these clocks in order to address 720p and 1080p HDMI resolution. Signed-off-by: Vincent Abriou Signed-off-by: Gabriel Fernandez --- arch/arm/boot/dts/stih407.dtsi | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) -- 1.9.1 diff --git a/arch/arm/boot/dts/stih407.dtsi b/arch/arm/boot/dts/stih407.dtsi index d60f0d8..291ffac 100644 --- a/arch/arm/boot/dts/stih407.dtsi +++ b/arch/arm/boot/dts/stih407.dtsi @@ -16,7 +16,10 @@ #size-cells = <1>; assigned-clocks = <&clk_s_d2_quadfs 0>, - <&clk_s_d2_quadfs 0>, + <&clk_s_d2_quadfs 1>, + <&clk_s_c0_pll1 0>, + <&clk_s_c0_flexgen CLK_COMPO_DVP>, + <&clk_s_c0_flexgen CLK_MAIN_DISP>, <&clk_s_d2_flexgen CLK_PIX_MAIN_DISP>, <&clk_s_d2_flexgen CLK_PIX_AUX_DISP>, <&clk_s_d2_flexgen CLK_PIX_GDP1>, @@ -26,14 +29,21 @@ assigned-clock-parents = <0>, <0>, + <0>, + <&clk_s_c0_pll1 0>, + <&clk_s_c0_pll1 0>, <&clk_s_d2_quadfs 0>, - <&clk_s_d2_quadfs 0>, + <&clk_s_d2_quadfs 1>, <&clk_s_d2_quadfs 0>, <&clk_s_d2_quadfs 0>, <&clk_s_d2_quadfs 0>, <&clk_s_d2_quadfs 0>; - assigned-clock-rates = <297000000>, <297000000>; + assigned-clock-rates = <297000000>, + <108000000>, + <0>, + <400000000>, + <400000000>; ranges;