From patchwork Wed Jul 6 08:54:28 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Griffin X-Patchwork-Id: 71436 Delivered-To: patch@linaro.org Received: by 10.140.28.4 with SMTP id 4csp755091qgy; Wed, 6 Jul 2016 01:56:18 -0700 (PDT) X-Received: by 10.66.156.9 with SMTP id wa9mr39766594pab.64.1467795378237; Wed, 06 Jul 2016 01:56:18 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id wy7si3249976pab.3.2016.07.06.01.56.17; Wed, 06 Jul 2016 01:56:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753902AbcGFIzy (ORCPT + 30 others); Wed, 6 Jul 2016 04:55:54 -0400 Received: from mail-wm0-f51.google.com ([74.125.82.51]:35201 "EHLO mail-wm0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753559AbcGFIzC (ORCPT ); Wed, 6 Jul 2016 04:55:02 -0400 Received: by mail-wm0-f51.google.com with SMTP id z126so103255586wme.0 for ; Wed, 06 Jul 2016 01:55:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=+Tgootbo8WnoevLJyY1RE0Ds6vIy1ad0wb9JkDyBoAo=; b=eUMWnaaxfhlSMtAHV7LfeK1whAxHdtOy82ZlALBhzd5WdMOTmxAq3BVAEPyFi8K18H LyDN7sW0iDac7eILWQD2c2kcPqsTuGiTXKkQ5k0pDqVeb6TtgZdvVynuA/k+2F/qBQGb z8WsNO0P6a8BzTnAS7gClAO+P+AB/TXP8Amkg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=+Tgootbo8WnoevLJyY1RE0Ds6vIy1ad0wb9JkDyBoAo=; b=K9F8zh0L81XaAdXu6D7T/SD0SQIfdGiqWSmgLhOn13qpBXAyjsBmf46HYGG6HTkCsy PVyowPrZVybLf/xAwasYZg/oZYOL9aKz/J66eXM1n/6+wh20AWhStl+AWg+IrCgSc42r PBdEOkg7/hVFJJGR/RWJ5wCp8OA0Os6AtNFUoSGvyKCP0bx38uNDN9l9uKsoEvby4ybS nhX0q7sEOd408VY5MIHkmI7NWPOKiX2drC7U4dmmcZuKRhH4oth/PX7pWcQwLF3/R8SE IJQI+moQHWq8Uz64P76RJeCSphf/VfoYiHB8QN6YmJdqpSxtbMmPBkkjuxxw+94JzN90 euXA== X-Gm-Message-State: ALyK8tLmSdjMblSb4N4XZa9SxP4U17MUWEczhfqIW/hP/IjpckmSX07yyiEyz3WMvF/SbnJ+ X-Received: by 10.194.62.143 with SMTP id y15mr3418860wjr.31.1467795295965; Wed, 06 Jul 2016 01:54:55 -0700 (PDT) Received: from localhost.localdomain (cpc84731-aztw28-2-0-cust112.18-1.cable.virginm.net. [82.37.67.113]) by smtp.gmail.com with ESMTPSA id 66sm5363803wmg.23.2016.07.06.01.54.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 06 Jul 2016 01:54:55 -0700 (PDT) From: Peter Griffin To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@stlinux.com, vinod.koul@intel.com, patrice.chotard@st.com, bjorn.andersson@linaro.org, ohad@wizery.com Cc: peter.griffin@linaro.org, lee.jones@linaro.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, Arnaud Pouliquen Subject: [PATCH v6 10/18] ARM: DT: STiH407: Add i2s_out pinctrl configuration Date: Wed, 6 Jul 2016 09:54:28 +0100 Message-Id: <1467795276-21725-11-git-send-email-peter.griffin@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1467795276-21725-1-git-send-email-peter.griffin@linaro.org> References: <1467795276-21725-1-git-send-email-peter.griffin@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds the pinctrl config for the i2s_out pins used by the uniperif player IP. Signed-off-by: Arnaud Pouliquen Signed-off-by: Peter Griffin --- arch/arm/boot/dts/stih407-pinctrl.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) -- 1.9.1 diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi index a538ae5..0fb5c8a 100644 --- a/arch/arm/boot/dts/stih407-pinctrl.dtsi +++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi @@ -1067,6 +1067,29 @@ }; }; + i2s_out { + pinctrl_i2s_8ch_out: i2s_8ch_out{ + st,pins { + mclk = <&pio33 5 ALT1 OUT>; + lrclk = <&pio33 7 ALT1 OUT>; + sclk = <&pio33 6 ALT1 OUT>; + data0 = <&pio33 4 ALT1 OUT>; + data1 = <&pio34 0 ALT1 OUT>; + data2 = <&pio34 1 ALT1 OUT>; + data3 = <&pio34 2 ALT1 OUT>; + }; + }; + + pinctrl_i2s_2ch_out: i2s_2ch_out{ + st,pins { + mclk = <&pio33 5 ALT1 OUT>; + lrclk = <&pio33 7 ALT1 OUT>; + sclk = <&pio33 6 ALT1 OUT>; + data0 = <&pio33 4 ALT1 OUT>; + }; + }; + }; + serial3 { pinctrl_serial3: serial3-0 { st,pins {