From patchwork Tue Jun 13 13:45:41 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 105342 Delivered-To: patch@linaro.org Received: by 10.140.91.77 with SMTP id y71csp414581qgd; Tue, 13 Jun 2017 06:48:49 -0700 (PDT) X-Received: by 10.84.238.141 with SMTP id v13mr64283146plk.162.1497361729865; Tue, 13 Jun 2017 06:48:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1497361729; cv=none; d=google.com; s=arc-20160816; b=pHifOYwaXxDRW95SUP+t1URJBi3mZxBMPKgGDHJQQeTki6l+ZPxC3FK4X7XTRTNZW0 914Eahg3Znr2BA5B0p4HIUW4QVkiCGYX9S76B2NQiYGZSDXUr766fSKYNsYcNuIzn1id GuUiRagtq5u6zT2IohxRVmzuQHpsoAV46wNG8BpFw4kHplDL6cdCnaVl/RDQgC6ZJRNJ 1iRu4urg5ZGD1sGswErjrcZ5Te8WloddJFBzN/pwDDB7+V8p3P7I0UsgNEOxOBdjE71H hOUDIyGG+WforH3iJgcNpOVbMEdNe4Nlb8lroAHgGCAS7uZ3myKm0CfdGC5MUxvzeHmk y4RA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter :arc-authentication-results; bh=zcwcVlQDvlf/7pv4coLYzdjbA1sOCuRGnZZERvn6B9c=; b=Ew4wFCIIm1qErVGzKmsI5zRDEU4UjTRTfQmr4Vn6ELXHxdgXdJrQuBAbtyvsVfBWcI +kqZPSzke3rNocaYHTRpE7uY+eWnoSs/zta+2GjhaPkDvSxvlaou8c3Hg3JOKDEOxnQk GgnDotktjPz/2WSy3zdga+nbZze3rflwOT9/+9Zos+SiJ6AQTmvsJHx35hfIt9TKSVqg GuprZXU+qZ9dmnRAtpc17YBqoFacKvNCIb48fzBjNFq/Ab62IBTXib5BjcAyVdZFurw9 i/Tr2We7U+Cam1Mnnc6Ak5UrRghC8+7WPJe5QMgN8CiyI5nP9Oe5xGj6/yDN0eQpf2cF B1KA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a20si5132906pfc.137.2017.06.13.06.48.49; Tue, 13 Jun 2017 06:48:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753580AbdFMNsl (ORCPT + 25 others); Tue, 13 Jun 2017 09:48:41 -0400 Received: from conuserg-09.nifty.com ([210.131.2.76]:31110 "EHLO conuserg-09.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753553AbdFMNsh (ORCPT ); Tue, 13 Jun 2017 09:48:37 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-09.nifty.com with ESMTP id v5DDjxiq031338; Tue, 13 Jun 2017 22:46:11 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-09.nifty.com v5DDjxiq031338 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1497361572; bh=zcwcVlQDvlf/7pv4coLYzdjbA1sOCuRGnZZERvn6B9c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kaeJVbuVJYoWIwfOqDGp6FY9V+kioSzLKhuu9E3RVkCZRKTQfhOVo6nKqxAJby+Aa sltUxRIUaOKhonCPMvfSSDqj5/Zujvkzn2XvL+uesLmYHr3S62OeY6bj194dEMu+bp QkRyERZAmb02UZdUeOAsX9vm1f0GZTYzUoi+vUTSHZ1zEsjbg/FNQvsaHzlWMy2lZ0 6VckJGWDFfLOnhrDmPVgbhHUN0PUP0YQAipAde67H9IdhoL2fwbMdDP9Wu6wTk7L1C pp8podRjuZxOz7ANc9pKZZns7OEi6/tJ31tVzrMZup1UwPmTJCwL2tTO86TTw4LqsJ 5oer1CtfgJqRw== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-mtd@lists.infradead.org Cc: Enrico Jorns , Artem Bityutskiy , Dinh Nguyen , Boris Brezillon , Marek Vasut , David Woodhouse , Masami Hiramatsu , Chuanxiao Dong , Jassi Brar , Masahiro Yamada , Cyrille Pitchen , linux-kernel@vger.kernel.org, Brian Norris , Richard Weinberger Subject: [PATCH v7 07/16] mtd: nand: denali: use interrupt instead of polling for bank reset Date: Tue, 13 Jun 2017 22:45:41 +0900 Message-Id: <1497361550-8115-8-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1497361550-8115-1-git-send-email-yamada.masahiro@socionext.com> References: <1497361550-8115-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The current bank reset implementation polls the INTR_STATUS register until interested bits are set. This is not good because: - polling simply wastes time-slice of the thread - The while() loop may continue eternally if no bit is set, for example, due to the controller problem. The denali_wait_for_irq() uses wait_for_completion_timeout(), which is safer. We can use interrupt by moving the denali_reset_bank() call below the interrupt setup. Signed-off-by: Masahiro Yamada --- Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: - Newly added drivers/mtd/nand/denali.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) -- 2.7.4 diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index 3169ba58c58a..31d987d26e12 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -1028,24 +1028,25 @@ static int denali_setup_data_interface(struct mtd_info *mtd, int chipnr, static void denali_reset_banks(struct denali_nand_info *denali) { + u32 irq_status; int i; - denali_clear_irq_all(denali); - for (i = 0; i < denali->max_banks; i++) { - iowrite32(1 << i, denali->flash_reg + DEVICE_RESET); - while (!(ioread32(denali->flash_reg + INTR_STATUS(i)) & - (INTR__RST_COMP | INTR__TIME_OUT))) - cpu_relax(); - if (!(ioread32(denali->flash_reg + INTR_STATUS(i)) & - INTR__INT_ACT)) + denali->flash_bank = i; + + denali_reset_irq(denali); + + iowrite32(DEVICE_RESET__BANK(i), + denali->flash_reg + DEVICE_RESET); + + irq_status = denali_wait_for_irq(denali, + INTR__RST_COMP | INTR__INT_ACT | INTR__TIME_OUT); + if (!(irq_status & INTR__INT_ACT)) break; } dev_dbg(denali->dev, "%d chips connected\n", i); denali->max_banks = i; - - denali_clear_irq_all(denali); } static void denali_hw_init(struct denali_nand_info *denali) @@ -1067,7 +1068,6 @@ static void denali_hw_init(struct denali_nand_info *denali) denali->bbtskipbytes = ioread32(denali->flash_reg + SPARE_AREA_SKIP_BYTES); detect_max_banks(denali); - denali_reset_banks(denali); iowrite32(0x0F, denali->flash_reg + RB_PIN_ENABLED); iowrite32(CHIP_EN_DONT_CARE__FLAG, denali->flash_reg + CHIP_ENABLE_DONT_CARE); @@ -1185,9 +1185,6 @@ static void denali_drv_init(struct denali_nand_info *denali) * element that might be access shared data (interrupt status) */ spin_lock_init(&denali->irq_lock); - - /* indicate that MTD has not selected a valid bank yet */ - denali->flash_bank = CHIP_SELECT_INVALID; } static int denali_multidev_fixup(struct denali_nand_info *denali) @@ -1262,6 +1259,9 @@ int denali_init(struct denali_nand_info *denali) } denali_enable_irq(denali); + denali_reset_banks(denali); + + denali->flash_bank = CHIP_SELECT_INVALID; nand_set_flash_node(chip, denali->dev->of_node); /* Fallback to the default name if DT did not give "label" property */