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[209.132.180.67]) by mx.google.com with ESMTP id g6si1531601pln.178.2017.05.17.01.38.48; Wed, 17 May 2017 01:38:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754221AbdEQIip (ORCPT + 25 others); Wed, 17 May 2017 04:38:45 -0400 Received: from mail-pg0-f49.google.com ([74.125.83.49]:36299 "EHLO mail-pg0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752023AbdEQIij (ORCPT ); Wed, 17 May 2017 04:38:39 -0400 Received: by mail-pg0-f49.google.com with SMTP id x64so3753199pgd.3 for ; Wed, 17 May 2017 01:38:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=R/slF/fdOeWZ43T8E80kJQcFp8IH7sRLB8INbfV2NkY=; b=jh5P8lSKH+dnXQ6p1ryvXvff4vvRCRD3vS3cbEO1eYNgmJHySnq/DFmII8/QZWa5BF ShneYPaU6O8zIPvW3tTTQPgXHXIG14OqGGU1X2ao02nXSiof+Pos0qS/qgTzonOkMRhZ ObEbmTuhWeaUito8zzE+kT7vHhHnbr+VnMKco= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=R/slF/fdOeWZ43T8E80kJQcFp8IH7sRLB8INbfV2NkY=; b=BibIfMd/RHYxoUU0+XieT0lvNfArpFFSUgvFtNFhcFwdiN72Q1oWa9MxB7I1TgjDb+ 4GUW2ClzpwoxtvGf/2G1GaLYA48hBHqYc6wRRUSwtgw6znbIdIU9Mofguh+HQY2FqbkZ a3EXUgo/r6L3hRfL7Okd8AIoIlnZBa77ROzuyiW+B42FeoTKKZm8O5r3pw1rU45MjLzm B6fHIUFI3yApwvvxhx/I8YXezmzeO8qIZex+mVIGcFKr0WqvFA52EOvmid9D2u+UpGiI CfQHKngmfytEFY5HDNdxF4IPE/ocndI/ZKjNnldZpJY6mekzYnhbmUHlC6FRc97Z6fnp bZEA== X-Gm-Message-State: AODbwcCkAZl/mKlYkWooAeF+v52YZXO9KFhxAQ20ukKovgyZc0svqpDq MIhxxCIQ8akoZVDX X-Received: by 10.98.95.193 with SMTP id t184mr2494301pfb.191.1495010318344; Wed, 17 May 2017 01:38:38 -0700 (PDT) Received: from docularxu-ThinkPad-T440p.219.146.1.66 ([45.56.159.164]) by smtp.gmail.com with ESMTPSA id u9sm3029519pgn.55.2017.05.17.01.38.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 17 May 2017 01:38:37 -0700 (PDT) From: Guodong Xu To: robh+dt@kernel.org, xuwei5@hisilicon.com, catalin.marinas@arm.com, will.deacon@arm.com, wangkefeng.wang@huawei.com, puck.chen@hisilicon.com, xuejiancheng@hisilicon.com, devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Zhangfei Gao , Guodong Xu Subject: [PATCH 05/12] arm64: dts: Add I2C nodes for Hi3660 Date: Wed, 17 May 2017 16:37:38 +0800 Message-Id: <20170517083745.24479-6-guodong.xu@linaro.org> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170517083745.24479-1-guodong.xu@linaro.org> References: <20170517083745.24479-1-guodong.xu@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Zhangfei Gao Add I2C nodes for Hi3660-hikey960. On HiKey960, I2C0, I2C7 is connected to Low Speed Expansion Connector. I2C1 is connected to ADV7535. I2C3 is connected to USB5734. Signed-off-by: Zhangfei Gao Signed-off-by: Guodong Xu --- arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 18 ++++++++ arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 56 +++++++++++++++++++++++ 2 files changed, 74 insertions(+) -- 2.10.2 diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index 64875a5..f685b1e 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -29,6 +29,24 @@ }; }; +&i2c0 { + status = "okay"; +}; + +&i2c1 { + status = "okay"; + + adv7533: adv7533@39 { + status = "ok"; + compatible = "adi,adv7533"; + reg = <0x39>; + }; +}; + +&i2c7 { + status = "okay"; +}; + &uart5 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index f55710a..f217c9d 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -186,6 +186,62 @@ #reset-cells = <2>; }; + i2c0: i2c@FFD71000 { + compatible = "snps,designware-i2c"; + reg = <0x0 0xFFD71000 0x0 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <400000>; + clocks = <&crg_ctrl HI3660_CLK_GATE_I2C0>; + resets = <&iomcu_rst 0x20 3>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pmx_func &i2c0_cfg_func>; + status = "disabled"; + }; + + i2c1: i2c@FFD72000 { + compatible = "snps,designware-i2c"; + reg = <0x0 0xFFD72000 0x0 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <400000>; + clocks = <&crg_ctrl HI3660_CLK_GATE_I2C1>; + resets = <&iomcu_rst 0x20 4>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pmx_func &i2c1_cfg_func>; + status = "disabled"; + }; + + i2c3: i2c@FDF0C000 { + compatible = "snps,designware-i2c"; + reg = <0x0 0xFDF0C000 0x0 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <400000>; + clocks = <&crg_ctrl HI3660_CLK_GATE_I2C3>; + resets = <&crg_rst 0x78 7>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_pmx_func &i2c3_cfg_func>; + status = "disabled"; + }; + + i2c7: i2c@FDF0B000 { + compatible = "snps,designware-i2c"; + reg = <0x0 0xFDF0B000 0x0 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <400000>; + clocks = <&crg_ctrl HI3660_CLK_GATE_I2C7>; + resets = <&crg_rst 0x60 14>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c7_pmx_func &i2c7_cfg_func>; + status = "disabled"; + }; + uart5: serial@fdf05000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0xfdf05000 0x0 0x1000>;