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[68.111.217.79]) by smtp.gmail.com with ESMTPSA id q13sm27948407pfd.100.2017.10.04.11.59.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 04 Oct 2017 11:59:03 -0700 (PDT) From: Bjorn Andersson To: Andy Gross Cc: Rob Herring , Mark Rutland , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org Subject: [PATCH 2/4] ARM: qcom_defconfig: Resync with new Kconfig options Date: Wed, 4 Oct 2017 11:58:55 -0700 Message-Id: <20171004185857.24510-3-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.12.0 In-Reply-To: <20171004185857.24510-1-bjorn.andersson@linaro.org> References: <20171004185857.24510-1-bjorn.andersson@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org CONFIG_HWSPINLOCK must be selected explicitly for SMEM and its dependencies to be enabled. The update is generated by "make savedefconfig" and as such reflects changes to the implicit state of other options, as of v4.14-rc1. Signed-off-by: Bjorn Andersson --- arch/arm/configs/qcom_defconfig | 17 +++-------------- 1 file changed, 3 insertions(+), 14 deletions(-) -- 2.12.0 diff --git a/arch/arm/configs/qcom_defconfig b/arch/arm/configs/qcom_defconfig index 879159e4ab58..82cd86e524a4 100644 --- a/arch/arm/configs/qcom_defconfig +++ b/arch/arm/configs/qcom_defconfig @@ -1,5 +1,4 @@ CONFIG_SYSVIPC=y -CONFIG_FHANDLE=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y CONFIG_IKCONFIG=y @@ -28,9 +27,7 @@ CONFIG_PCI=y CONFIG_PCI_MSI=y CONFIG_PCIE_QCOM=y CONFIG_SMP=y -CONFIG_HAVE_ARM_ARCH_TIMER=y CONFIG_PREEMPT=y -CONFIG_AEABI=y CONFIG_HIGHMEM=y CONFIG_CLEANCACHE=y CONFIG_ARM_APPENDED_DTB=y @@ -57,14 +54,12 @@ CONFIG_CFG80211=y CONFIG_RFKILL=y CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y -CONFIG_QCOM_EBI2=y CONFIG_MTD=y CONFIG_MTD_BLOCK=y CONFIG_MTD_M25P80=y CONFIG_MTD_SPI_NOR=y CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_RAM=y -CONFIG_SCSI=y CONFIG_BLK_DEV_SD=y CONFIG_CHR_DEV_SG=y CONFIG_CHR_DEV_SCH=y @@ -103,7 +98,6 @@ CONFIG_SERIO_LIBPS2=y CONFIG_SERIAL_MSM=y CONFIG_SERIAL_MSM_CONSOLE=y CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_MSM=y CONFIG_I2C=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_QUP=y @@ -123,9 +117,9 @@ CONFIG_PINCTRL_QCOM_SSBI_PMIC=y CONFIG_GPIOLIB=y CONFIG_DEBUG_GPIO=y CONFIG_GPIO_SYSFS=y -CONFIG_CHARGER_QCOM_SMBB=y CONFIG_POWER_RESET=y CONFIG_POWER_RESET_MSM=y +CONFIG_CHARGER_QCOM_SMBB=y CONFIG_THERMAL=y CONFIG_QCOM_TSENS=y CONFIG_MFD_PM8XXX=y @@ -163,7 +157,6 @@ CONFIG_USB_GADGET_VBUS_DRAW=500 CONFIG_MMC=y CONFIG_MMC_BLOCK_MINORS=32 CONFIG_MMC_ARMMMCI=y -CONFIG_MMC_QCOM_DML=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MMC_SDHCI_MSM=y @@ -173,7 +166,6 @@ CONFIG_LEDS_GPIO=y CONFIG_LEDS_PM8058=y CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_RPMSG_QCOM_SMD=y CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_PM8XXX=y CONFIG_DMADEVICES=y @@ -187,15 +179,16 @@ CONFIG_IPQ_GCC_4019=y CONFIG_IPQ_LCC_806X=y CONFIG_MSM_GCC_8660=y CONFIG_MSM_LCC_8960=y -CONFIG_MDM_GCC_9615=y CONFIG_MDM_LCC_9615=y CONFIG_MSM_MMCC_8960=y CONFIG_MSM_MMCC_8974=y +CONFIG_HWSPINLOCK=y CONFIG_HWSPINLOCK_QCOM=y CONFIG_REMOTEPROC=y CONFIG_QCOM_ADSP_PIL=y CONFIG_QCOM_Q6V5_PIL=y CONFIG_QCOM_WCNSS_PIL=y +CONFIG_RPMSG_QCOM_SMD=y CONFIG_QCOM_GSBI=y CONFIG_QCOM_PM=y CONFIG_QCOM_SMEM=y @@ -213,7 +206,6 @@ CONFIG_IIO_HRTIMER_TRIGGER=y CONFIG_BMP280=y CONFIG_PHY_QCOM_APQ8064_SATA=y CONFIG_PHY_QCOM_IPQ806X_SATA=y -CONFIG_NVMEM=y CONFIG_QCOM_QFPROM=y CONFIG_EXT2_FS=y CONFIG_EXT2_FS_XATTR=y @@ -234,7 +226,4 @@ CONFIG_PRINTK_TIME=y CONFIG_DYNAMIC_DEBUG=y CONFIG_DEBUG_INFO=y CONFIG_MAGIC_SYSRQ=y -CONFIG_LOCKUP_DETECTOR=y -# CONFIG_DETECT_HUNG_TASK is not set # CONFIG_SCHED_DEBUG is not set -CONFIG_TIMER_STATS=y