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[209.132.180.67]) by mx.google.com with ESMTP id p8si4547394pfj.378.2017.12.14.22.26.24; Thu, 14 Dec 2017 22:26:24 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=uwWryJ30; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753779AbdLOG0V (ORCPT + 20 others); Fri, 15 Dec 2017 01:26:21 -0500 Received: from mail-pf0-f196.google.com ([209.85.192.196]:46817 "EHLO mail-pf0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753596AbdLOG0Q (ORCPT ); Fri, 15 Dec 2017 01:26:16 -0500 Received: by mail-pf0-f196.google.com with SMTP id c204so5475510pfc.13; Thu, 14 Dec 2017 22:26:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=geRSmLXPVH4DGmsAu9Uy3SgxCprz45cFvvwXPSqD9vA=; b=uwWryJ308LdaEtJNoSORH9s6A1AEzi2FYPrjPX36v8I6HvXV7T83ZALjOJMFcXrOu8 GEbs5CxHtiBnwRnRusSPwGYZPOarFgqQpkKQtqbcZwMBpBtXWGKwB7BcvH1nnPTBVlzx rMnyeUbQebbp5c9vcyF8P9qqK3cOcPzr6RcmvKguP93BDKWnR/dNfz1bJHIzOMm96Qd0 q9rH6UdOQ1Kkf4XvodKjLmL1Dw1Eto0Owj8bLxOc+K7MF5grCcX22tRYbgONKKqXnx4N h9QZ563XKm4K44UrJUTzGn3MeYVhPw0nQkeSWvg97X/XkC6K9w7CZR/Bag+yjpELF77t XY7A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=geRSmLXPVH4DGmsAu9Uy3SgxCprz45cFvvwXPSqD9vA=; b=aEwlgCYbkAABYPfXw0Whme9ZydSIProKfZ6Z0OH0/c/2vcMFYgLPLfLAx1rw5UMP42 Qd3ZK3FYRkn6w0LUqVI6m8B4sEQE2vo5GBHmEXu3IMnMZMave0uLIEh04WWYd0n0ERbe iWcwtquO6i8NMtt+LwPItSBC4aUQZFzRT1iLdJAjIvkgluJGeELC8cMluvjCAK503uVe L6XYzwKd44ATP9wwzB7yYa2yx0DY+tpwgb3IgVE91cP+k9o1kH3ZSS/6BluptKzQdlzH 7H88Xz0g4uUoSCwFLXZvpvETtbX2Y4hJ9emIDxXpC7TLcLzSRO5HbgfH4NnG7qK5OQFL qCdA== X-Gm-Message-State: AKGB3mLTyuI7Hd2+s0wgkJWzwGEv69blO5jx/tN79F5ZQsnZg3dHAdUk pnNWiLchnTIg+2AziKaKmWw= X-Received: by 10.99.178.14 with SMTP id x14mr10863697pge.423.1513319175786; Thu, 14 Dec 2017 22:26:15 -0800 (PST) Received: from aurora.jms.id.au ([203.0.153.9]) by smtp.gmail.com with ESMTPSA id p13sm9702642pgn.32.2017.12.14.22.26.08 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 14 Dec 2017 22:26:14 -0800 (PST) Received: by aurora.jms.id.au (sSMTP sendmail emulation); Fri, 15 Dec 2017 16:56:06 +1030 From: Joel Stanley To: Rob Herring , Mark Rutland , Arnd Bergmann , Andrew Jeffery , Patrick Venture , Xo Wang , Lei YU Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= , Benjamin Herrenschmidt , Jeremy Kerr , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-aspeed@lists.ozlabs.org Subject: [PATCH v2 07/19] ARM: dts: aspeed: Add flash controller clocks Date: Fri, 15 Dec 2017 16:54:31 +1030 Message-Id: <20171215062443.23059-8-joel@jms.id.au> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20171215062443.23059-1-joel@jms.id.au> References: <20171215062443.23059-1-joel@jms.id.au> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Joel Stanley --- arch/arm/boot/dts/aspeed-g4.dtsi | 2 ++ arch/arm/boot/dts/aspeed-g5.dtsi | 3 +++ 2 files changed, 5 insertions(+) -- 2.14.1 Reviewed-by: Cédric Le Goater diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index 2e3666d4fbeb..afac0ca0cb10 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -56,6 +56,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "aspeed,ast2400-fmc"; + clocks = <&syscon ASPEED_CLK_AHB>; status = "disabled"; interrupts = <19>; flash@0 { @@ -71,6 +72,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "aspeed,ast2400-spi"; + clocks = <&syscon ASPEED_CLK_AHB>; status = "disabled"; flash@0 { reg = < 0 >; diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index 24bb2d16b900..f3689caf6fe2 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -56,6 +56,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "aspeed,ast2500-fmc"; + clocks = <&syscon ASPEED_CLK_AHB>; status = "disabled"; interrupts = <19>; flash@0 { @@ -81,6 +82,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "aspeed,ast2500-spi"; + clocks = <&syscon ASPEED_CLK_AHB>; status = "disabled"; flash@0 { reg = < 0 >; @@ -100,6 +102,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "aspeed,ast2500-spi"; + clocks = <&syscon ASPEED_CLK_AHB>; status = "disabled"; flash@0 { reg = < 0 >;